Vijesti i novosti o Intel procesorima i čipsetima - Stranica 212

The Exiled · Jučer, 20:51

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Autor Disco

A pazi ti brzinu tog nedostižnog RAM-a, ma to će koštat sve skupa ko suho zlato.
Sretno im bilo. Šteta što je tako, jer je konkurencija potrebna.
Ali ajd, možda narančasti bude subvencionirao plave ili naredio micronu da im spusti cijene ili neki vrag. Nikad se ne zna.

Da, cijene budu za plakati, dok se TSMC i dalje angažira za dosta toga kaj bi prema PR i marketing pričama, Intel trebal sam za sebe, a bome i za druge proizvoditi. Svašta bude tu još u godinama koje dolaze, jer nema naznaka da budu se cijene stabilizirale, a kamoli smanjile. Meteor Lake model u ThinkPad T14 izdanju sam svojevremeno kad su taman izašli platil tadašnjih ~1.200€, a sad je taj rang u Panther Lake verzijama točno duplo skuplji i to ovak na papiru, prije nego se svi kroz marže i poreze namire kak spada s tim da je B390 iGPU najbolji dio te priče i IMHO glavni razlog za kupnju.

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nVidia to build GPUs on Intel Foundry from 2028

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nVidia's upcoming "Feynman" AI GPU will partially use Intel Foundry nodes, a DigiTimes report says. nVidia recently invested a 5% stake in Intel, and is exploring tapping into Intel Foundry manufacturing capacity. In particular, nVidia is interested in the Intel 18A and 14A foundry nodes for certain components of its upcoming "Feynman" AI GPU that launches in 2028, succeeding the current "Rubin" AI GPU. nVidia also intends to tap into Intel's EMIB technology for its chiplet interconnectivity, the report says.

The "Feynman" AI GPU will still be majorly TSMC-based, with its core IP being built on die(s) leveraging TSMC A16 (1.6 nm) foundry node, which is expected to make up 75% of the chip's value. The remaining silicon content will be built on Intel 18A or Intel 14A nodes, and the chip's final packaging is expected to take place in U.S. soil, at Intel Foundry. This way, it will be Intel handling the EMIB chiplet bonding. "Feynman" is expected to implement a newer memory standard, such as HBM4e or even HBM5, and significantly increase memory per package, so each chip can handle trillion-parameter scale models.

Izvor: DigiTimes