| The Exiled |
03.09.2025. 18:20 |
Valjda budu nekaj od svih tih silnih najava donekle i sproveli u djelo, dok se nadolazeći Nova Lake po svemu sudeći, bazira na dual-chiplet/tile + IOD/SoC dizajnu.
Citiraj:
Intel Nova Lake-S engineering sample runs 52 cores at 4.8GHz:sweating:
Citiraj:
Intel's upcoming "Nova Lake-S" introduces a completely new microarchitecture and under-the-hood enhancements. However, the appearance of the latest shipping manifests indicates that Intel is ensuring its partners receive early samples to make necessary software/firmware optimizations. An early engineering sample confirms the appearance of test hardware in partner shipments, which means that Intel is already moving validation pieces to OEMs and cooling vendors so they can start tuning systems well ahead of qualification samples and mass production. The 52-core part is a tiled design that pairs two compute tiles with a single SoC tile. Each compute tile houses eight P-Cores based on Coyote Cove and 16 efficient E-Cores based on Arctic Wolf, while the SoC tile contributes four low-power Arctic Wolf LPE-cores. That gives Nova Lake-S a 16 P-Core, 32 E-Core, and 4 LPE-Core configuration totaling 52 cores for the top SKU, with single-tile variants offering a 28-core option.
As for SMT, just like Arrow Lake, the P-Cores on Nova Lake CPUs won't feature SMT support. The same core is also being used for Diamond Rapids. This is one generation that won't bring SMT to the table, though under Lip-Bu Tan, Intel is poised to bring it back with the future generation of server CPUs such as Coral Rapids, so the same would be the case for the desktop lineup. Razor Lake or a new family will likely reintroduce this feature.
Intel will also offer big-cache bLLC variants aimed at workloads that benefit from larger on-die caches. On the platform side, Nova Lake-S will use the LGA-1954 socket with a 45x37.5 mm footprint, which matches LGA-1851 sizing and should preserve broad cooler compatibility even if some vendors need offset plates or other tweaks for optimal contact. The P-cores will ship without SMT, following the same choice made for Arrow Lake, while Intel's cache-first bLLC approach looks intended to counter AMD's stacked 3D V-Cache strategy. For now, the 4.8 GHz reading comes from an engineering sample and Pre-QS shipments; expect clock speeds to be refined upward as QS samples roll out and Intel moves closer to a formal launch.
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Izvor: TechPowerUp
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Citiraj:
Qualcomm Inc. Chief Executive Officer Cristiano Amon said Intel Corp.’s production technology isn’t currently good enough for the maker of mobile phone processors to use as a supplier. If Intel is able to advance its manufacturing techniques to produce more efficient chips, then Qualcomm would consider becoming a customer. “Intel is not an option today,” Amon said. “We would like Intel to be an option.” Instead, the CEO said Qualcomm will stick with current producers Taiwan Semiconductor Manufacturing Co. and Samsung Electronics Co.
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EDIT:
Citiraj:
Intel will continue to rely heavily on external foundries, using TSMC forever:kafa:
Citiraj:
Intel plans to go green, and the first step is to pay the ongoing debts using U.S. CHIPS Act funds. Intel has shared its future strategy and discussed ongoing transformation efforts to reach financial stability, operational efficiency, and growth targets. The company is optimistic about its turnaround plan despite the numerous challenges ahead. The initial reception to these changes seems to be positive, as the stock jumped by about 2.54% today.
On Thursday, September 4, 2025, Intel presented a strategy overview at Citi’s 2025 Global Technology, Media and Telecommunications Conference. The discussion highlighted plans to de-leverage its balance sheet with investments from the U.S. Government and SoftBank. Starting with the $5.7bn of U.S. grant – $2.2 billion of which are already received – Intel plans to use these funds plus other proceeds from asset sales to pay back about $3.8bn of maturing debt this year. These assets include nearly $1 billion from the Mobileye stock sale, which should enhance the liquidity position. Chief Financial Officer, David Zinsner, has also told investors that Intel will continue putting certain products on TSMC’s wafers forever, as the company focuses on separating its design and foundry businesses to improve efficiency. This statement is not surprising considering 30% of the silicon comes from TSMC already. Intel will likely keep high-volume chips in its fabs, while placing others with TSMC. The idea is to grab more foundry customers while lowering near-term cash burn. Intel wants to set up its foundry business as a subsidiary to improve accountability, but won’t be selling more than 49% to external customers.
According to Zinsner, the initial $2.2 billion U.S. transaction was important for Intel, as it eliminated uncertainty around those grants. Furthermore, since these funds will translate into equity stakes for the U.S. Government, they represent a sort of endorsement of the brand, which should incentivise Intel to be successful, especially since the U.S. Government is expected to vote in line with the board’s recommendations. The remaining $3 billion grant, which is expected to be paid over the next couple of years, should further help Intel get back on its feet. Zinsner has also added that the firm’s Altera divestment will close in the upcoming weeks, providing an additional $3.5 billion. Not to forget Softbank’s $2 billion investment, which is pending regulatory approval.
All of these capital injections should notably strengthen Intel’s cash position, providing the financial flexibility to pursue its debt-reduction strategy. The company has apparently learned from previous mistakes, where it spent considerable money ahead of demand. For the near future, CEO, Lip-Bu Tan, seems to put a lot of confidence in the upcoming 14A process despite being more costly than 18A. That said, the company will only build 14A manufacturing capacity if it secures commitments from external customers. Intel’s Panther Lake CPUs are expected to launch by the end of the year, manufactured using the 18A process, with major offerings expected by 2028, leveraging the 14A node. The company will continue focusing on improving its product portfolio while enhancing pricing and market penetration. We shall see the fruits of these efforts soon.
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Izvor: Club386
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Citiraj:
Intel’s key lobbyist for Ohio plant, along with several project managers, exits amid slowdown of U.S. chipmaking ambitions:hitthewal:
Citiraj:
Intel's 'talent drain' isn't limited to lower-level employees; several of Team Blue's key figures, including those who played a key role in the Ohio facility, are departing from the firm. It is claimed that Kevin Hoggatt has been involved with Intel on the 'government relations' front, and on his LinkedIn post announcing his departure from the firm, Hoggatt revealed that he was in the groundbreaking ceremony of the Ohio One plant, accompanying President Biden. Moreover, he joined Intel's interim co-CEO David Zinsner as well on President Trump's inauguration, which shows that he had a vital role to play when it comes to establishing a 'collaborative' ground with US adminstrations.
Apart from Hoggatt, Toby Starr, who is the public affairs manager, has also departured Intel, along with construction site manager Sanjay Patel and senior Program Manager of the Foundry division Tom Marshall. Interestingly, it has been three years since the Ohio One fab was announced by Team Blue, and despite such a long time, there are little signs of starting high-end process production in the facility, which shows that the economic slowdown within Team Blue has started to affect the firm's chipmaking ambitions. It is claimed that the Ohio fab will not be operational until 2031, and the firm's Oregon facility is also facing issues concerning large-scale layoffs and investment cutbacks.
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izvor: Columbus Business First
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