[The Exiled]

Dual-socket EPYC Milan vs. Quad-Socket Intel Platinum. At the higher-end we can see that AMD is competing with the 4-socket 3rd Gen Intel Xeon Scalable Cooper Lake’s top bin Xeon Platinum 8380H CPUs. It is showing that it can offer a consolidation path and at much lower power. Even in the 28-32 core range, the EPYC 75F3 is an ultra-fast 32-core offering that makes Cascade Lake processors simply look like slow low-power CPUs. Since AMD has been in the market with PCIe Gen4 since Rome in 2019, NVIDIA’s partners have started to design systems around AMD EPYC Milan CPUs with NVIDIA PCIe Gen4 accelerators and networking.

With the EPYC 7003 being a second-gen PCIe Gen4 platform, it is now Intel that is catching up since the PCIe Gen4 ecosystem works on AMD today. With the Ice Lake Xeon generation, we are getting PCIe Gen4 which Intel has shown. We are going to get more PCIe lanes as well. We already know this 10nm chip is based on a newer Sunny Cove-based design and will feature 8-channel DDR4 memory. As is customary with a new process node, we expect more cores, but given Intel’s public challenges at 10nm and the fact that Ice Lake was designed in Intel’s monolithic die era. Being years delayed due to fabs means Intel is unlikely to try matching AMD (or Arm’s) core/ socket offerings.

Nažalost za Intel, njihov Ice Lake stiže malo prekasno, tj. AMD je još EPYC Rome spremil za okršaj s Intelovim 10nm modelima.

Obzirom da znamo kakve performanse nude Sunny Cove jezgre, ništa drastično se neće desiti njihovim dolaskom u serverski svijet.

the central IO die is from GlobalFoundries, and with the increase in Infinity Fabric performance the IO die is now consuming almost 40% of the total power of the processor. So the I/O die (on Milan) is actually tweaked from Rome. Originally we were planning on it being identical. It is very close, but most of the changes [in the new design] were actually around power to improve the efficiency of that I/O die, because we are running more through it in Milan. I think looking forward, we are going to continue to drive more aggressive power sensitive design techniques into the next generation of the uncore.