[The Exiled]

Intel’s integrated graphics mini-review: Is Rocket Lake Core 11th Gen competitive?

Intel’s LP improves on the previous Gen11 graphics by reorganizing the base structure of the design. Rather than 7 logic units per execution unit, we now have 8, and LP’s front-end can dispatch up two triangles per clock rather than one. The default design of LP involves 96 execution units, split into a centralized ‘slice’ that has all the geometry features and fixed function hardware, and up to 6 ‘sub-slices’ each with 16 logic units and 64 KiB of L1 cache. Each variant of LP can then have up to 96 execution units in a 6x16 configuration. The full Tiger Lake LP solution has all 96 execution units, with six sub-slices each of 16 execution units (6x16), Rocket Lake is neutered by comparison. Rocket Lake has 4 sub-slices, which would suggest a 64 execution unit design, but actually half of those EUs are disabled per sub-slice, and the final result is a 32 EU implementation (4x8). The two lowest Rocket Lake processors have only a 3x8 design.

Izvor: AnandTech