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The Exiled · 14.06.2025., 18:14

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Intel tells employees when to expect factory layoffs + Intel Foundry layoffs could impact 'more than 10,000' factory workers

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Intel told its factory workers this month that it will begin laying off workers in mid-July, and that “initial” cuts will conclude by the end of that month. “These decisions are extremely difficult,” the executives wrote, “but they are necessary to help Intel achieve a more competitive market position and to put our company on a solid footing for the future.” Intel will start to lay off its fab personnel at its Silicon Forest campus in Oregon from the middle of July. The first round will conclude by the end of that month, but the company may perform another round of layoffs if it deems necessary. An internal message sent to employees at Intel's production facilities outlined that the company is restructuring its Intel Foundry manufacturing group to make it more focused on engineering and technical roles (i.e., cutting middle management). While no exact figures were provided, the communication acknowledged the seriousness of the decision and claimed it as a necessary step to improve the company's financial position.

Intel did not announce how many positions it plans to cut at Intel Foundry. However, people from other divisions indicated to Oregon Live that they expect similar reductions, though each unit would be allowed to manage the process independently as long as they meet specific cost-reduction targets. The most critical roles, such as engineers who develop and maintain cutting-edge process technologies, and high-skill technicians who manage complex equipment like EUV and High-NA EUV lithography systems, are essential to fab operations and unlikely to be affected by layoffs without risking delays in technology development or production uptime. However, Intel may reduce headcount among roles that have become more redundant due to automation or operational streamlining. These include fab operators, administrative staff, logistics personnel, and lower-skill technicians in highly automated areas.

On the one hand, by targeting non-core functions and consolidating support roles, Intel can cut costs while preserving the technical expertise needed to keep its most advanced manufacturing lines running. On the other hand, cutting lower-skilled personnel may reduce operational flexibility, slow response times during equipment issues, and increase workload for remaining employees. Keeping in mind that these fabs run 24/7, even small delays in maintenance or logistics can lead to costly downtime. Nonetheless, it looks like for Intel, desperate times call for desperate measures.

Izvor: The Oregonian i Tom's Hardware

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Intel "Nova Lake‑S" Series: Seven SKUs, Up to 52 Cores and 150 W TDP

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Expected to arrive in the second half of 2026, Nova Lake‑S will offer configurations ranging from mainstream quad‑core models to a flagship with 52 cores. Initial information suggests that Intel will employ a tile-based design, separating LPE cores from P-Cores and E-Cores to optimize flexibility and yield. At the top of the lineup is the rumored Core Ultra 9 model, possibly designated 385K. It will combine 16 P-cores, 32 E-cores, and four LPE-cores for a total of 52 cores, as previously rumored. With a TDP of 150 W, it will be the most powerful SKU Intel prepared for this generation. Below the flagship, Intel appears to be planning a Core Ultra 7 SKU with 14 P-cores, 24 E-cores, and four LPE cores, totaling 42 cores.
The Core Ultra 5 series may include three variants: a 28-core version with eight P-cores, 16 E-cores, and four LPE-cores; a 24-core version with eight P-cores, 12 E-cores, and four LPE-cores; and an 18-core model with six P-cores, eight E-cores, and four LPE-cores. Entry-level Core Ultra 3 parts would feature either a 16-core configuration with four P-cores, eight E-cores, and four LPE-cores, or a 12-core option with four P-cores, four E-cores, and four LPE-cores, both targeting a 65 W power envelope. All desktop SKUs are expected to feature four LPE cores on a separate die, suggesting a multi-tile package similar to Meteor Lake. Power demands will range from 65 W in entry-level segments to 150 W for high-end parts. Intel is reportedly preparing a new LGA 1954 socket even as it readies an Arrow Lake-S refresh for late 2025. Intel has also reportedly designated Xe3 "Celestial" for graphics rendering and Xe4 "Druid" for media and display duties.

Izvor: TechPowerUp

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Intel showcases 18A node performance: 25% faster and 40% lower power draw

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Intel's presentation at the VLSI Symposium in Japan offered a detailed look at the upcoming Intel 18A process, which is set to enter mass production in the second half of 2025. This node combines Gate-All-Around transistors with the PowerVia backside power delivery network, resulting in a completely new metal stack architecture. By routing power through the rear of the die, Intel has been able to tighten interconnect pitches on critical layers while relaxing spacing on the top layer, improving yield and simplifying fabrication. In standardized power, performance, and area tests on an Arm core sub-block, Intel 18A demonstrated roughly 15% higher performance at the same power draw compared to Intel 3. When operating at 1.1 volts, clock speeds increase by up to 25% without incurring additional energy costs, and at around 0.75 volts, performance can rise by 18%, or power consumption can drop by nearly 40%.

Under the hood, the process features significant cell height reductions: performance‑tuned cells measure 180 nanometers tall, while high‑density designs sit at 160 nanometers, both smaller than their predecessors. The front‑side metal layers have been reduced from between 12 and 19 on Intel 3 to between 11 and 16 on Intel 18A, with three additional rear metal layers added for PowerVia support. Pitches on layers M1 through M10 have been tightened from as much as 60 nanometers down to 32 nanometers before easing again in the upper layers. Low-NA EUV exposure is used on layers M0 through M4, cutting the number of masks required by 44% and simplifying the manufacturing flow. Intel plans to debut 18A in its low‑power "Panther Lake" compute chiplet and the efficiency‑core‑only Clearwater Forest Xeon 7 family. A cost-optimized 17-layer variant, a balanced 21-layer option, and a performance-focused 22-layer configuration will address different market segments.

Izvor: TechPowerUp

Intel 18A proces na papiru izgleda odlično, posebice u usporedbi s planiranim otkazima za ~10.000 ljudi iz toliko im bitnih proizvodnih pogona nikad važnije domaće proizvodnje, ali sva sreća, pa se ljudi iz proizvodnih pogona ne bave nečim važnim, dok se istovremeno slaže opet nova garnitura raznih direktorskih pozicija.

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Intel to outsource marketing to Accenture and AI, resulting in more layoffs

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Employees at Intel's marketing division were informed that many of their roles will be handed over to Accenture, which will use AI to handle tasks traditionally done by Intel staff, reports OregonLive. The decision is part of a company-wide restructuring plan that includes job cuts, automation, and streamlining of execution. The marketing division has been one of Intel's key strengths since the company began communicating directly with end users with the launch of its "Intel Inside" campaign in 1991. However, it looks like the company will drastically cut its human-driven marketing efforts going forward, as it plans to lay off many of its marketing employees, believing that Accenture's AI will do a better job connecting Intel with customers. The number of positions affected was not disclosed, but Intel confirmed changes will significantly alter team structures, with only 'lean' teams remaining. Workers will be told by July 11 whether they will remain with the company.

Among other things, the aim of the restructuring is to free up internal teams to focus on strategic, creative, and high-value projects, rather than routine functions. Therefore, Intel intends to use Accenture's AI in various aspects of marketing, including information processing, task automation, and personalized communications. Intel has acknowledged the shift to Accenture and explained that this will not only cut costs but will modernize its capabilities and strengthen its brand. How exactly the usage of AI instead of real people can reinforce the brand hasn't been explained yet. In messages to staff published by OregonLive, Intel indicated that part of the restructuring may involve existing employees training Accenture contractors by explaining how Intel's operations work. This knowledge transfer would occur during the transitional phase of the outsourcing plan, although it is unclear how long this phase will take.

Izvor: The Oregonian

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Intel winds down automotive division, prepares for major layoffs

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Intel has confirmed plans to phase out its in-house automotive chip team and lay off most of the employees in that segment. In a memo to staff on Tuesday, the company stated that it will honor existing contracts with vehicle manufacturers and suppliers but will essentially dissolve the unit that designed and marketed its small automotive platform. This move supports Intel's new strategy under new CEO Lip-Bu Tan to concentrate on client computing and data center operations. "We are refocusing on our core client and data center portfolio to strengthen our product offerings and meet the needs of our customers," the statement said. "As part of this work, we have decided to wind down the automotive business within our Client Computing Group. We are committed to ensuring a smooth transition for our customers."

Officially, Intel is eliminating excessive management layers, but a CRN report indicates that the company is surprisingly laying off chip design engineers and architects. Among the job categories being eliminated are 22 physical design engineers, three physical design engineering managers, and several logic and product development engineers. The company is also removing roles such as cloud software architects and engineering managers, in addition to positions tied to business and project management, including a vice president of IT and multiple technology strategy leads. Employees in California are engaged in the development of CPU and GPU products.

Intel's automotive division has never generated a major share of revenue, and the company does not report its results separately. Still, Intel highlights that over 50 million vehicles worldwide use its processors for services such as infotainment, electric vehicle management, and driver assistance. Despite that footprint, the division remains small compared with the rest of Intel's diverse chip portfolio. Importantly, the decision does not affect Mobileye, which Intel spun off and took public in 2023. Mobileye continues to operate independently, even though Intel retains nearly all of the voting shares. Intel has already informed its manufacturing staff of plans to cut up to 20% of its workforce starting in July. It will also outsource much of its marketing function to Accenture, relying on AI to manage campaigns. These actions are much needed for Intel's determination to make operations leaner and sharpen its focus on the markets where it remains strongest.

Izvor: The Oregonian i Tom's Hardware

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Intel Nova Lake CPUs to feature bLLC Cache, rivaling AMD 3D V-Cache

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Intel is working on its next generation of desktop processors called Nova Lake, which are expected to include a new cache feature named big Last Line Cache, or bLLC. This technology aims to boost gaming and multitasking performance by increasing the L3 cache size, similar to AMD’s 3D V-Cache found in their X3D processors. Two upcoming Nova Lake models will combine 8 high-performance cores with 4 low-power efficiency cores. One will have 20 extra efficiency cores, and the other 12, both operating with a 125-watt power limit. The bLLC technology already exists in Intel’s Clearwater Forest server CPUs. In those chips, the cache is embedded in a base tile underneath the core tiles, which helps improve performance without causing the heat and clock speed issues that come from stacking cache on top of cores.

This design mirrors AMD’s 9000-series X3D processors, which attach their 3D V-Cache to the bottom of the CPU dies. The Nova Lake-S series is set to launch in late 2026 or early 2027 and will include at least six desktop models using a new LGA 1954 socket. The lineup will range from a high-end Core Ultra 9 485K with 52 cores and a 150-watt TDP, down to a Core Ultra 3 415K with 12 cores running at 125 watts. Out of these, two models are expected to feature the bLLC cache, which should help close the performance gap with AMD’s 3D V-Cache chips in gaming and demanding workloads.

Izvor: Guru3D

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Intel Nova Lake performance leak claims 10% single and 60% multi-threaded uplift

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Potential Intel Nova Lake CPU performance figures are now roaming the internet, stating over 10% ST and 60% MT performance increase. it looks like Intel is aiming for greater than 10% Single-Threaded gains and over 60% multi-threaded performance with its next-gen Nova Lake-S Desktop CPUs. Now, do keep in mind that the 10% figure is for the single-threaded performance, and not IPC. The Nova Lake-S CPUs feature the latest Coyote Cove P-Cores and Arctic Wolf E-Cores, both of which are new architectures and expected to deliver big gains. According to Intel, the chips are being designated as the "Ultimate Performance and Efficiency" package with "Leadership Gaming Performance". So Nova Lake-S might just be able to tackle AMD's current Ryzen lineup, though by the time of its release, the chips will be competing with next-gen Ryzen's based on the Zen 6 core architecture. Intel is expected to launch Nova Lake in 2026. Before that, a refresh of Arrow Lake is still planned, but it may only include a few K-series models.

Izvor: Wccftech

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Intel's new CEO explores big shift in chip manufacturing business

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Intel's new chief executive is exploring a big change to its contract manufacturing business to win major customers in a potentially expensive shift from his predecessor's plans. If implemented, the new strategy for what Intel calls its "foundry" business would entail no longer marketing certain chipmaking technology, which the company had long developed, to external customers. Since taking the company's helm in March, CEO Lip-Bu Tan has moved fast to cut costs and find a new path to revive the ailing U.S. chipmaker. By June, he started voicing that a manufacturing process that prior CEO Pat Gelsinger bet heavily on, known as 18A, was losing its appeal to new customers, said the sources, who spoke on condition of anonymity. To put aside external sales of 18A and its variant 18A-P, manufacturing processes that have cost Intel billions of dollars to develop, the company would have to take a write-off.

Intel declined to comment on such "hypothetical scenarios or market speculation." It said the lead customer for 18A has long been Intel itself, and it aims to ramp production of its "Panther Lake" laptop chips later in 2025, which it called the most advanced processors ever designed and manufactured in the United States. Persuading outside clients to use Intel's factories remains key to its future. As its 18A fabrication process faced delays, rival TSMC's N2 technology has been on track for production. Tan's preliminary answer to this challenge: focus more resources on 14A, a next-generation chipmaking process where Intel expects to have advantages over Taiwan's TSMC. The move is part of a play for big customers like Apple and nVidia which currently pay TSMC to manufacture their chips.

Tan has tasked the company with teeing up options for discussion with Intel's board when it meets as early as this month, including whether to stop marketing 18A to new clients. The board might not reach a decision on 18A until a subsequent autumn meeting in light of the matter's complexity and the enormous money at stake. Intel declined to comment on what it called rumor. In a statement, it said: "Lip-Bu and the executive team are committed to strengthening our roadmap, building trust with our customers, and improving our financial position for the future. We have identified clear areas of focus and will take actions needed to turn the business around." Last year was Intel's first unprofitable year since 1986. It posted a net loss attributable to the company of $18.8 billion for 2024.

Like Gelsinger, Tan inherited a company that had lost its manufacturing edge and fell behind on crucial technology waves of the past two decades: mobile computing and artificial intelligence. The company is targeting high-volume production later this year for 18A with its internal chips, which are widely expected to arrive ahead of external customer orders. Meanwhile, delivering 14A in time to win major contracts is by no means certain, and Intel could choose to stick with its existing plans for 18A. Intel is tailoring 14A to key clients' needs to make it successful, the company said.

Shifting away from selling 18A to foundry customers would represent one of his biggest moves yet. However, according to some industry analysts, the 18A process is roughly equivalent to TSMC's so-called N3 manufacturing technology, which went into high-volume production in late 2022. If Intel follows Tan's lead, the company would focus its foundry employees, design partners and new customers on 14A, where it hopes for a better chance to compete against TSMC.

Izvor: Reuters

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Intel CEO says he's betting the entire company's future on its 18A process

Gelsinger fires back at recent stories about 18A's poor yields, schools social media commenters on defect densities and yields

Intel mulls changes to chip-making biz: potential write-off of Intel 18A would cost billions

Intel now reportedly focusing on 14A production as 18A proves to be a billion dollar failure

Intel considers abandoning 18A node for 14A chipmaking process

OK, sad kad je 18A proces praktički mrtav, kakav im je daljnji plan i program (1 - 2 - 3 - 4 - 5) ili slijedi još jedna promjena glavnog direktora u vječnoj rotaciji nadobunih likova.

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Intel’s former CEO Pat Gelsinger says he underestimated the impact of AI

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Well, Intel's ex-CEO did acknowledge the company's "delayed" response towards AI, as he has now claimed that the impact of the technology was miscalculated at his time. If you look at what Intel has done with AI, it has been nothing short of disappointment, especially in the realm of AI accelerators and rack-scale solutions, since even after several years, Team Blue has failed to present a competitive solution. Sure, the company does offer its Gaudi AI accelerators to the market, but they have witnessed little adoption from cloud companies, which shows that Intel isn't near to competitors at all when it comes to the hottest industry. Now, in a report by Nikkei Asia, it is revealed that Intel's former CEO Pat Gelsinger has admitted to the company's lackluster approach towards AI during his tenure.

Intel's reluctance towards AI is much more evident when Gelsinger initially presumed "inference" to be everything, when nVidia and others were busy with model training. Intel's ex-CEO at that time claimed that the firm was ready to capitalize on the inferencing demand when it came, and even called out CUDA as a "moat". Despite such claims, we never really saw anything from Intel in the AI segment worthy of competing with nVidia, except for their Xeon server CPUs, mainly since they were a "multi-decade" product of Team Blue. Fast forward to what is happening with Intel and AI right now. The company's optimistic accelerator project, Falcon Shores, had been canceled, and the new CEO is looking to enter the rack-scale market with Jaguar Shores. Competitors like nVidia and AMD have already been offering their solutions for many years now, and Intel is nowhere to be seen in an industry that has generated hundreds of billions over the past quarters. And now, Team Blue is struggling to maintain its current business, let alone expand into new frontiers.

Interestingly, Intel's ex-CEO still believes that having an internal semiconductor manufacturing unit is the way to approach product design, despite the financial obligations it carries. Intel has been heavily criticized for its "IDM 2.0" strategy, and it seems like the new CEO, Lip-Bu Tan, is decoupling from it by focusing less on the foundry business and more on design, one of Intel's core businesses. It is certain that we are going to see drastic changes with Intel moving into the future, one that would likely have noticeable consequences.

Izvor: Nikkei Asia

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Intel "Diamond Rapids" Xeon CPU to feature up to 192 P-cores and 500 W TDP

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Intel's next-generation "Oak Stream" platform is preparing to accommodate the upcoming "Diamond Rapids" Xeon CPU generation, and we are receiving more interesting details about the top-end configurations Intel will offer. According to the HEPiX TechWatch working group, the Diamond Rapids Intel Xeon 7 will feature up to 192 P-cores in the top-end SKU, split across four 48-core tiles. Intel has dedicated two primary SKU separators, where some models use eight-channel DDR5 memory, and the top SKUs will arrive with 16-channel DDR5 memory. Using MRDIMM Gen 2 for memory will enable Intel to push transfer rates to 12,800 MT/s per DIMM, providing massive bandwidth across 16 channels and keeping the "Panther Cove" cores busy with sufficient data. Intel planned the SoC to reach up to 500 W in a single socket.

As the first mass-produced 18A node product, Diamond Rapids will be the first to support Intel's APX, also featuring numerous improvements to the efficiency of AMX. Intel also plans to embed native support for more floating-point number formats, such as nVdiia's TF32, and lower-precision FP8. As most of the world's inference is good enough to run on a CPU, Intel aims to accelerate basic inference operations for smaller models, enabling power users to run advanced workloads on CPUs alone. With a 1S, 2S, and 4S LGA 9324 configuration, Diamond Rapids will offer 768 cores in a single server rack, with a power usage of only 2000 W. Supporting external accelerators will be provided via the PCIe Gen 6 connector. Scheduled for arrival in 2026, Intel will likely time the launch to coincide with its upcoming "Jaguar Shores" AI accelerators, making a perfect pair for a complete AI system.

Izvor: TechPowerUp