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Originally posted by stiv haris
da više razriješimo razliku između veničea e3 i e6.......
razlika je u 3 (tri) detaljčića odnosno greške kod e3 revizije koje su ispravljene u e6......
sve tri "greške" odnose se na integrirani memorijski kontroler......
kod AMD-a su detalji opisani u 3 točke:
113. Enhanced Write-Combining Feature Causes System Hang
Description
The enhanced write-combining feature provides up to four write-combining buffers, but a potential
stall condition can occur when write combining into all four buffers with this feature enabled.
Potential Effect on System
System hang.
Suggested Workaround
Disable the enhanced write-combining feature by setting BU_CFG.WbEnhWsbDis (bit 48 of MSR
C001_1023h). This reduces the number of available write-combining buffers from four to one.
114. DDR Data Pin Drive Strength Also Affects Command/Address
Pins
Description
Adjusting the drive strength of the DDR data pins by writing to the MemDQDrvStren field in the
DRAM Configuration High register (Dev:2x94[14:13]) also affects the drive strength of the
command/address pins.
Potential Effect on System
Adjusting the drive strength may cause unreliable operation of the DRAM interface.
Suggested Workaround
Do not adjust the DDR data pin drive strength settings in Dev:2x94[14:13]. BIOS should ensure that
these configuration bits remain at the default value of 00b.
116. DDR Chip Selects Tristated One Clock Early in Power Down
Mode
Description
When entering DDR Power Down mode with the Power Down Tristate feature enabled, the chip
selects are tristated coincident with the deassertion of the CKE pins, which is a violation of the DDR
specification.
Potential Effect on System
The DRAM enters an invalid state, resulting in unpredictable system operation. This applies only to
Power Down mode when the PwrDwnTriEn bit is set.
Suggested Workaround
Do not enable the Power Down Tristate feature. BIOS should ensure that Dev:2x90[7] remains at the
default value of 0b.
Izvor:Revision Guide for AMD Athlon™ 64 and AMD Opteron™ Processors..........
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to je dodatak razlog izvedbe u bezolovnom procesu je razlog e6-ice, da nije doslo do tog standarda...bila bi samo novija revizija iliti poboljsani e3, svejedno tnx 4 the info nisam ni znao da e6 imao poboljsani mem kontroler
