Evo zašto Intel ne lemi IHS i CPU die od vremena Ivy bridge-a. "Void and micro crack occurrence is mainly affected by the solder area – thus the DIE size. Small DIE size (below 130 mm˛) e. g. Skylake will facilitate the void occurence significantly. However, CPUs with a medium to large DIE size (above 270 mm˛) e. g. Haswell-E show no significant increase of micro cracking during thermal cycling (Figure 12). This failure mechanism is one reason why small DIE CPUs like Haswell-DT or Skylake are not soldered while the large Haswell-EP CPUs are soldered."
http://overclocking.guide/the-truth-...cpu-soldering/