AMD "Threadripper/Epyc" Info thread

[Lewis]

Slotovi 1,2 su Extenderi 16x na 16x shielded i grafe direkt u 3 i 7 za sada, slot 6 jos dostupan ( sve grafe su 2.5 slota tako da su extenderi jedino rjesenje.

[MadBoY]

Koliko god AMD bio dobar za mainstream platformu i servere, toliko u HEDT segmentu pokazuju da su isti kao i Intel. Nema konkurencije = nema novih proizvoda. HEDT Zen 3 Threadripperi dolaze godinu dana nakon Zen 3 Epyc procesora, tj. debelo kasne. 5000 serija je već trebala imati 3D cache. Ne vjerujem da se Threadripperi Pro prodaju u toliko velikim količinama da bi stvarali problem za dostupnost Epyc procesora.

[Lewis]

Tr Pro nije konkurencija Epycu jer je samo single socket i sasvim drugacija platforma/maticne a u drugu ruku "ubili" su Xeone cak i dual socket konfama.

U biti cini mi se da su dugo vijecali interno sta da rade sa obicnim TRom pa su shvatili da im netreba pored Pro verzije.

[BusMaster]

Autor Lewis

Tr Pro nije konkurencija Epycu jer je samo single socket i sasvim drugacija platforma/maticne a u drugu ruku "ubili" su Xeone cak i dual socket konfama.
U biti cini mi se da su dugo vijecali interno sta da rade sa obicnim TRom pa su shvatili da im netreba pored Pro verzije.

Evo izgleda da ipak idu na dual socket platformu..
Link: https://www.tomshardware.com/news/du...95wx-benchmark

[BusMaster]

AMD’s Monstrous EPYC Genoa CPU For SP5 ‘LGA 6096’ Socket Pictured:
Up To 96 Zen 4 Cores, 400W TDP

Link: https://wccftech.com/amds-monstrous-...ores-400w-tdp/

[The Exiled]

AMD Ryzen CPUs get cheaper, Threadripper 5000 finally launches

• AMD announces Ryzen Threadripper Pro 5000 WX-Series: Zen 3 for OEM Workstations

[The Exiled]

AMD releases Milan-X CPUs with 3D V-Cache: EPYC 7003 up to 64 cores and 768 MB L3 cache

• AMD EPYC 7773X "Milan-X" benchmarks show very strong HPC performance upgrade
  
  
• AMD Milan-X delivers AMD EPYC caches to the GB-era

[BusMaster]

Dell Announces Threadripper 5000 Pro Workstations

Linkovi:

https://www.tomshardware.com/news/de...ipper-5000-pro

https://www.dell.com/en-us/blog/newe...eadripper-pro/

[The Exiled]

AMD EPYC 9000 “Genoa” processor lineup leaks out, up to 96 Zen 4 cores and 360W TDP

AMD's EPYC CPU lineup has propelled AMD from being, essentially, a no-name brand within the enterprise CPU market into one of the fastest growing creators of high-performance processors. With Genoa, AMD's next-generation EPYC processors, AMD plans to continue that growth, and we have just gotten a look at some pre-launch CPU specifications for these upcoming processors. We have seen a list of pre-launch EPYC 9000 series processors, Zen 4 CPUs that will use AMD's new SP5 enterprise CPU socket and feature support for up to 12 DDR5 memory channels, and PCIe 5.0 connectivity. 18 models have been showcased, ranging from models with 16 cores to models with 96 cores and from TDPs of 200W to TDPs of 360W.

AMD's highest-end Genoa SKU appears to be a 360W 96-core, 192-thread processor that features 384MB of cache and clock speeds of between 2.0 GHz and 2.15 GHz. This model is the EPYC 9654P, and it is possible that AMD has a higher performance Genoa CPU model in the works. With AMD's EPYC 9000 series processors, AMD apparently plans to deliver users core count options of 16 cores, 24 cores, 32 cores, 48 cores, 64 cores and 96 cores. Variants of these processors will feature different clock speeds and cache amounts, with AMD's highest clocking model bosting to. 3.8 GHz.

AMD plans to launch their Zen 4 EPYC processors before the end of 2022, and in the future AMD plans to release more Zen 4 EPYC series CPUs in the form of Genoa-X, which should feature 3D V-Cache. AMD's Zen 4 EPYC processors are now said to be "production ready", though at this time the pricing of AMD's newest EPYC series processors are unknown. We can expect AMD to market heavily how much value their new EPYC lineup offers when compared to Intel's latest Xeon processors in various workloads, focusing on TOC (Total Cost of Ownership) and unit pricing.

Izvor: OC3D i HardwareLUXX

[The Exiled]

It’s Finally Here! AMD’s Ryzen Threadripper Pro 5995WX, Benchmarks, Power & Cooling + Threadripper 5975wx for the DIY! Tested and Overclocked

• AMD Ryzen Threadripper PRO 5965WX Performance On Linux

[The Exiled]

AMD EPYC 9004 “Genoa-X” and “Bergamo” CPUs SKU lists leaks out, EPYC 9754 features 128 Zen4c cores

AMD is yet to officially launch its Genoa data-center CPU series. The company also announced it is working on seperate series with 3D V-Cache and also density optimized Zen4c series. Both of those products have been included into the new, quite long, one should add, lineup of server CPUs. The naming convention for 9004 and 8004 series of Zen4 CPUs will be divided into two sockets: SP5 for 9004 series and SP6 for 8004. The new series will go range from 8 to 128 cores, but 112 and 128 configurations will be reserved to Zen4 based Bergamo CPUs. In fact, only the core count will tell customers if they are buying Bergamo or Genoa because the latter simply does not go above 96 cores.

Similarly to Milan-X, the upcoming Genoa-X series with 3D V-Cache will also carry the X moniker, differentiating it from P (1 socket) and F (high frequency) Genoa CPUs. Configurable TDP will vary from 200 to 400W depending on the model, however the high-core count and high-frequency variants are all above 290W. The EPYC 9754 “Bergamo” is to feature 128 Zen4C cores (with a stripped-down L3 cache) and up to 256 MB of L3 Cache. This CPU will boost up to 3.2 GHz and will have a TDP of 360W. With 16 cores fewer, there is EPYC 9734 with identical boost clock but also 40W lower TDP.

AMD is preparing four Genoa-X CPU, offering up to 96 cores, with the flagship part called 9684X featuring 96 cores and massive 1.1 GB of L3 Cache. This part has a TDP of 400W, which is the highest TDP from all 4th Gen EPYC CPUs.

AMD Bergamo next cloud CPUs to pack 160 Cores

Izvor: Interneti i Hardware Times

[The Exiled]

AMD launches 4th Gen EPYC "Genoa" Zen 4 server processors: 100% performance uplift for 50% more cores

AMD at a special media event titled "together we advance_data centers," formally launched its 4th generation EPYC "Genoa" server processors based on the "Zen 4" microarchitecture. These processors debut an all new platform, with modern I/O connectivity that includes PCI-Express Gen 5, CXL, and DDR5 memory. The processors come in CPU core-counts of up to 96-core/192-thread. There are as many as 18 processor SKUs, differentiated not just in CPU core-counts, but also the way the the cores are spread across the up to 12 "Zen 4" chiplets (CCDs). Each chiplet features up to 8 "Zen 4" CPU cores, depending on the model; up to 32 MB of L3 cache, and is built on the 5 nm EUV process at TSMC. The CCDs talk to a centralized server I/O die (sIOD), which is built on the 6 nm process. The processors AMD is launching today are the EPYC "Genoa" series, targeting general purpose servers, although they can be deployed in large cloud data-centers, too. To large-scale cloud providers such as AWS, Azure, and Google Cloud, AMD is readying a different class of processor, codenamed "Bergamo," which is plans to launch later. In 2023, the company will launch the "Genoa-X" line of processor for technical-compute and HPC applications, which benefit from large on-die caches, as they feature the 3D Vertical Cache technology. There will also be "Siena," a class of EPYC processors targeting the telecom and edge-computing markets, which could see an integration of more Xilinx IP.

The EPYC "Genoa" processor, as we mentioned, comes in core-counts of up to 96-core/192-thread, dominating the 40-core/80-thread counts of the 3rd Gen Xeon Scalable "Ice Lake-SP," and also staying ahead of the 60-core/120-thread counts of the upcoming Xeon Scalable "Sapphire Rapids." The new AMD processor also sees a significant buff of its I/O capabilities, featuring a 12-channel (24 sub-channel) DDR5 memory interface, and a gargantuan 160-lane PCI-Express Gen 5 interface (that's ten Gen 5 x16 slots running at full bandwidth). and platform support for CXL and 2P xGMI links by subtracting some of those multipurpose lanes. The new 6 nm server I/O die (sIOD) has a significantly higher transistor count than the 12 nm one powering past-gen EPYC processors. The high transistor count is due to two large 80-lane configurable SERDES (serializer-deserializer) components, which can be made to put out PCIe Gen 5 lanes, CXL 1.1 lanes, SATA 6 Gbps ports, o