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Staro 22.03.2023., 21:46   #5821
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Sve u svemu zanimljivo, pogtovo, ako se stvari odigraju na ovaj način.
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The situation could play out similarly to 10th gen Comet Lake vs AMD Zen 2 where the former was competitive with AMD’s offerings only to be trounced by the Zen 3 CPUs shortly after. The same source also shared that AMD Zen 5 will release before Arrow Lake (ARL-S) which is scheduled for H2 2024. In other words, if ARL-S is indeed H2 2024 and RPL-R is scheduled for Q3/Q4 2023, Intel may only be competitive with AMD for a few months before the launch of Zen 5. As a refresher, the AMD Zen 5 is rumored to enjoy up to a 30% IPC uplift in addition to other architectural improvements.
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Staro 22.03.2023., 22:12   #5822
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ja sam ovo zapamtio

Digital Linear Voltage Regulator (DLVR) is an Intel technology that reportedly has the potential to reduce power consumption by up to 25%. Although the technology was present on pre-release Raptor Lake CPUs, Intel disabled it on retail hardware. Per MLID, if DLVR makes its way into RPL-R, it could give Intel some much-needed power headroom to push performance even further

25% manja potrošnja ne znači 25% viši takt,ćemo vidjet,mislim da 13900k/s neće moć iznad 6,5 ghz jer da bude 25% porat performansi na 6 ghz bi značilo 7,5 ghz takt.
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Staro 22.03.2023., 22:24   #5823
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Da, DLVR je nastavak FIVR-a koji je implementiran u Haswell eri, ali ga do Skylakea više nije bilo, tak da lako moguće da Intel opet implementira takvo rješenje. 10nm desktop Ice Lake je trebal vratiti FIVR, a znamo kak je to završilo.
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Intel's Fully Integrated Voltage Regulator (FIVR) was not without it's problems though, as it increased to CPUs temperature, limiting overclockability and reduced the impact that a high end motherboard could have on overclocking, as users were stuck using Intel's power delivery system.
Mada, IMHO to i dalje ne mijenja činjenicu da Intel opet mora dodatno pogurati postojeću arhitekturu, dok ne pripreme novu, koja će po svemu sudeći kasniti za Zen 5 konkurencijom.
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Intel confirms delay in its acquisition of Tower Semiconductor
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Intel's planned purchase of Tower Semiconductor Ltd. has been pushed back by another quarter, as a regulatory decision has not been made by China's State Administration for Market Regulation (SAMR). Intel announced the $5.4 billion deal in mid-February 2022, and set an estimated 12-month window for its completion. It is now one month overdue, with the first quarter of the financial year set to end next week. Intel is hopeful that it will get full regulatory approval by June 2023. In light of SAMR not budging since the suspending of its review of the Intel-Tower merger, Intel Israel has issued a response this week: ""While we continue to work to close the Tower transaction within the first quarter of 2023, the transaction may close in the first half of 2023, subject to certain regulatory approvals and customary closing conditions." Intel appointed Stuart Pann as senior vice president and general manager of Intel Foundry Services (IPS) earlier this week. It has been speculated that company's original plan would have been to place a Tower Semiconductor executive in the that leadership role, but the prospect of a delayed merger caused a change of course and Intel decided to promote from within their own ranks.
Izvor: TechPowerUp
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Zadnje izmijenjeno od: The Exiled. 24.03.2023. u 10:39.
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Staro Jučer, 18:20   #5824
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Novi planovi koji će se bez ikakve dvojbe obestiniti uz minimalne odgode i potencijalna otkazivanja kompletnih proizvodnih linija, jer Intel sve ovo zapravo već ima spremno.
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Intel updates Data Center roadmap: Xeons on track - Emerald in Q4'23, Sierra Forest in H1'24
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The high-level message Intel is looking to project is that the company is finally turning a corner in their critical data center business segment after some notable stumbles in 2021/2022. In the CPU space, despite the repeated Sapphire Rapids delays, Intel’s successive CPU projects remain on track, including their first all E-core Xeon processor. Meanwhile Intel’s FPGA and dedicated AI silicon (Gaudi) are similarly coming along, with new products hitting the market this year while others are taping-in. Intel is keen to show investors that they’re shipping the superior silicon, especially as AMD has the advantage in terms of core counts. So expect Intel to focus on things like their AI accelerator blocks, as well as comparisons that pitch an equal number of Sapphire Rapids (Golden Cove) and Geona (Zen 4) CPU cores against each other.

According to Intel, Emerald Rapids chips are already sampling to customers. At the same time, volume validation is already underway as well. As Emerald Rapids is a relatively straightforward successor to Sapphire Rapids, Intel is looking to avoid the long validation period that Sapphire Rapids required, which will be critical for making up for lost time and getting the next Xeon parts out by the end of this year. Customers will be able to swap out Sapphire for Emerald in their existing designs, allowing for easy upgrades of already-deployed systems, or in the case of OEMs, quickly bringing Emerald Rapids systems to the market.

Granite Rapids remains on track for its previously announced 2024 launch. The part is expected to launch “closely following” Sierra Forest, Intel’s first E-core Xeon processor, which is due in H1’24. Despite being at least a year out, Granite Forest is already to the point where the first stepping is up and running, and it’s already sampling to some Intel customers. As noted in previous disclosures, Granite Rapids is a tile-based architecture, with separate compute and I/O tiles – an evolution from Sapphire Rapids, which even in its tiled form is essentially a complete SoC in each tile. Granite Rapids’ compute tiles are being built on the Intel 3 process, Intel’s second-generation EUV node, having been pulled in from Intel 4 in its earliest incarnation. Meanwhile we still don’t have significant official information on the I/O tiles.

Sierra Forest is another previous Intel disclosure that the company is updating investors on, and is perhaps the most important of them. The use of E cores in a Xeon processor will significantly boost the number of CPU cores Intel can offer in a single CPU socket, which the company believes will be extremely important for the market going forward. Not only will the E core design improve overall compute efficiency per socket (for massively threaded workloads, at least), but it will afford cloud service providers the ability to consolidate even more virtual machine instances on to a single physical system. Like Granite Rapids, Sierra Forest is already up and running at Intel.
Izvor: AnandTech
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Staro Jučer, 18:22   #5825
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Takvim Intelovim najavama u zadnje vrijeme vjerujem koliko i proročanstvima Vidovitog Milana.
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Staro Jučer, 18:22   #5826
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Just wait.
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Staro Jučer, 18:23   #5827
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Takvim Intelovim najavama u zadnje vrijeme vjerujem koliko i proročanstvima Vidovitog Milana.
I to kaj veliš, s tim da kod Milana barem znaš kaj očekivati, dok je situacija kod Intela malo zajebanija, ali lako za to i zajebanciju na stranu, ukoliko išta od ovoga uspiju sprovesti u djelo - dobro bude.
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Sierra Forest will use only E-cores to achieve higher core counts in order to compete with AMD's Epyc server processors codenamed Bergamo which features up to 128 smaller Zen 4c cores.

AMD's Zen 4c cores feature simultaneous multithreading (SMT) while the Gracemont E-cores featured in Sierra Forest processors only contain one thread for each core.
Ovo bude zanimljivo, obzirom da je Zen 4c zapravo punokrvni Zen 4, samo kaj su smanjili L3 cache za Zen 4c s 32MB na 16MB, tako da na kraju lakše imaju 16-core CCD/CCX za 128C/256T EPYC Bergamo CPU.
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Zadnje izmijenjeno od: The Exiled. Jučer u 18:31.
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