Vijesti i novosti o Intel procesorima i čipsetima

[Matta]

Autor McG

...and the final version will have its three PCI-E 2.0 expansion slots running electronically at x16, x8 and x8 lanes.

Zasto korak dolje ? Ajde, razumio bih x16, x16 i x8 ali ovako... Marketinski nepopularan potez.
Vjerovatno nemaju dovoljno lajnova pa radije idu sa 1x16 i 2x8 i 1x4 nego 2x16 i 1x4 (plus 1x1) kao dosad.

[žile]

Možda ako treći ne radi imaš 16x+16x.
Znaš da na ovim našim pločama imaš 16x+4x ako treći ne radi,a tada 16x+1x+1x.

[DuHc]

Autor McG

Pošto (barem prema izvorima Barbare Radulović) Razer već zasigurno pikira DFI-ovu inačicu, nema straha da i drugi proizvođači ne ponude podjednako skup(lje)e i(li) opremljen(ij)e ploče.
Od zanimljivijih X58 ploča očekuju se još Asus P6T6 WS Revoution (ovu Bubba nabavlja za Božić), Biostar T-Power X58 i Asus X58 Rampage II Extreme.
Eventualno još da u bundle ubace album kakvog black metalcore/death metal benda sa ženskim vokalima i slobodno mogu štampati naljepnice Brutal Edition.

E, to bi svakako bilo za pozdraviti!

[De5tr0yer]

aukurac ova P6T6 izgleda prebrutalno... a moja p5k je i dalje ruzna u 3 strine...

[Vuco]

Asus P6T6 WS Revolution ima dva NF200 chipseta:

Motherboard manufacturers have several choices implementing SLI support on their X58 models. They can license SLI from NVIDIA and certify the board in their labs or use separate nForce 200 bridge chip/chips. Now Asus has introduced P6T6 WS Revolution.
This board features 6 PCI Express x16 slots.. three of them (blue ones) are x16 for 3-Way SLI. This is made possible with two NVIDIA nForce 200 bridge chips on board which offer enough PCIe lanes.

[Skorn]

vezano uz gornji post, posto P6T6 WS Rev nema niti jedan PCI-E x1 port, zanima me da li se pci-e x1 deviceovi mogu jednako koristiti i preko punog X16 slota? ne zanima me teorija već da li je tko isprobao u stvarnosti. hvala.

ps ne usmjeravajte me na googlanje

[^SuperUnknown^]

Autor Skorn

da li se pci-e x1 deviceovi mogu jednako koristiti i preko punog X16 slota?

Da, isprobano vise puta...

[Skorn]

nasao na wikiju ovo: PCIe slots come in a variety of physically different sizes referred to by the maximum lane count they support, ie. x1, x2, x4, x8, x16 and x32. A PCIe card will fit into a slot of its size or bigger, but not into a smaller PCIe slot.

ali sam skeptican prema wikiju otkada su frendovog poznanika iz šale proglasili antipapom i sada je ostalo tako zastalno Mirko Krav Fabris (Pope Krav I)

hvala na infou!

[McG]

Autor Matta

Zasto korak dolje ? Ajde, razumio bih x16, x16 i x8 ali ovako...

Piše u tekstu vezanom za ploču da je to prema nVidiji najbolji raspored za Triple-SLi. Dal je ili nije - totalno svejedno.

[dejanbinladen]

zasad lose zvuci za overkolkere i nehalem
http://www.bug.hr/vijesti/index.asp?id=92305

[McG]

Autor dejanbinladen

zasad lose zvuci za overkolkere i nehalem

Intel X58: Workaround for VDimm problem: 1, 2
Pitanje je kaj je ovoga istina i kaj bude iz svega na kraju ispalo.

EDIT:
Will high VDimm cause damage? The answer to that question is not so simple actually. Our answer at this time is Yes and No. In actuality the correct answer depends on the available BIOS options, BIOS settings, memory selection, and final voltage settings. Intel’s stance is clear on this subject, run VDimm higher than their 1.50V~1.65V guidelines and you will affect the life span of the processor. Put simply, if you go crazy with VDimm, let’s say around 2.0V~2.2V without additional tuning, then expect to greatly reduce the processor lifespan to a few weeks or maybe days.

The base secret (there are more) is maintaining correct amplitude levels, something we will discuss at product launch. For now, high VDimm is not necessarily the true problem here, but it is the quickest way to damage/destroy an i7 if the system is not properly tuned. We highly recommend keeping VDimm at or below Intel’s recommendations along with proper BIOS settings for the long-term health of the i7. Upcoming DDR3 products from the major memory suppliers will all support low voltage DDR3-1066~DDR3-1600 operation with fairly aggressive timings. In addition, the vast majority of JDEC spec DDR3 memory currently on the market will operate fine on the X58, albeit at slightly higher memory timings in some cases.

With the right board, cooling, and BIOS settings, 1.7V~1.8V should be fine (no promises yet) and will allow the upcoming low-voltage, high clock speed DDR3 DIMMS to reach the 1866~2200MHz level. This should satisfy most performance enthusiasts, but probably not the extreme clockers who will try for more. For the rest of us, this platform offers simply amazing bandwidth and latency numbers with tri-channel DDR3 1066 or DDR3 1333. In fact, we think tri-channel DDR3-1333 at 5-5-5-12 timings or DDR3-1500~DDR3-1600 6-6-5-15 settings (1.65V) will provide optimal memory bandwidth, write speeds, and latencies for 95% of the users at this point. So, unlike the P45/X38/X48 platforms, having low-speed rated DDR3 is not going to be a hindrance to extracting fantastic performance from a i7/X58 setup.

Izvor: AnandTech

[Milentije]

http://www.tweak.dk/nyheder2.php?id=18212 Njamiiiiiiiiiiiiii

[Mejzlik]

Autor Milentije

http://www.tweak.dk/nyheder2.php?id=18212 Njamiiiiiiiiiiiiii

Bolesnjava

[McG]

Autor Mejzlik

Bolesnjava

Možda, ali kaj onda reći za Asus WS s prijašnje stranice. Sama preporučena cijena od ~600 jura ju po stupnju "bolesnoće" stavlja ispred svih ostalih X58 modela.
Ova DFI bude se kolko god dobra bila našla u rangu s ovakvim (~€250 do €350 rang) i sličnim pločama, dok "bolesnjava" ide neke druge modele.

[Milentije]

Autor McG

...Asus WS ... preporučena cijena od ~600 jura ....

[McG]

The GeForce 9300 and 9400 are similar in many ways to the GeForce 8200/8300 from the AMD world, but obviously since we're talking about non-Nehalem Intel platforms they do have a few changes like the inclusion of a memory controller. Like their AMD counterparts however, the GeForce 9300/9400 are single-chip solutions and unlike the 8200/8300 they are built on a smaller 65nm manufacturing process.GeForce 9300 boards should be selling for around $100 on average. While the 80nm GeForce 8200 and 8300 featured 8 SPs, the GeForce 9300 and 9400 have twice that: 16 stream processors. The only difference between the 9300 and 9400 are clock speeds (450MHz/1.2GHz vs. 580MHz/1.4GHz). And just as we saw with the GeForce 8200/8300, we had no problems overclocking our GeForce 9300 to 9400 clock speeds. The 9300 will be the chipset to look at, the 9400 is simply a way of getting more money out of the consumer.

nVidia can finally offer 780G-like performance with the GeForce 9300, and in some cases significantly outperform it. The G45 comparison doesn't even make sense to mention here, nVidia is beyond significantly faster in most cases. We finally have a reasonable integrated graphics solution for Intel processors. Motherboards based on the GeForce 9300 chipset are available starting today. We tested two boards in-house: the Asus P5NA-VM and the MSI P7NGM.
The Blu-ray decode quality of the GeForce 9300 is identical to the GeForce 8200, which in turn is identical to the G45 and AMD's 780G - as you'd expect. We've also got full hardware decode for MPEG-2, VC-1 and H.264 on the GPU itself which results in very low CPU utilization numbers while playing back Blu-ray and other supported HD content.

Recenzije MCP7 ploča: Zotac GeForce 9300 i ECS GF9300TA

Izvor: AnandTech, Guru3D i Bit-Tech

[McG]

DFI is first to release a GF9400 (MCP7A-U) mainboard that supports the LGA775 Core 2 family of processors.
The model name is DFI LP JR GF9400–T2RS. The MCP7A-U (GF9400) runs at a higher GPU CLK compared to the MCP7A-S (GF9300).

• Intel Core 2 Duo and Quad Core
• NVIDIA MCP7A-U
• DDR2 Support
• Solid Capacitors
• 1 x16 Gen2 PCIE Slots and Hybrid SLI
• 1 x2 PCIE Slot and 1 PCI Slot
• 4 phase Digital PWM with 12 MOSFET
• 1 GbE LAN ports by VSC8601 GbE PHY
• ALC885 for 8 channels HD audio
• 245x245mm uATX 4 layers PCB in Black

Izvor: OCWorkbench

[McG]

At just $260 the ECS X58B-A Black Edition should certainly appeal to more cost concious upgraders. The board has a simple design – six phase power regulation and just one phase for north bridge and another for all six memory slots. ECS claims support for an impressive DDR3-1600 XMP, although we’ll have to see for ourselves if this works. ECS does include solid aluminium capacitors and environmentally sealed chokes, but the MOSFETs are old school and there’s no attempt for fancy power regulation like other companies are now using.

There are two Realtek Gigabit Ethernet chipsets that include the usual teaming function, as well as Realtek ALC888S High-Definition sound. The JMicron JMB362 chipset offers a couple of eSATA ports, but there is only the base level six SATA included. There’s simple onboard power and reset buttons and clear CMOS button on the rear I/O, in addition to a two digit POST LED readout, a pair of PCI-Express 2.0 x16 slots, one x4 slot, two x1 slots and one PCI. The board is also both SLIi and CrossFire multi-GPU certified as well.

Izvor: Bit-Tech

[stuc]

Huh.., ova ploča ima skoro pa savršeni raspored. Samo je baterija na lošem mjestu a sve ostalo su dobro posložili.
Sata konektori dobro pozicionirani, u slučaju dual slot grafi još uvjek ostaje jedan PCI i jedan x4 PCI Express a i područje oko socketa je čisto.
Hlađenje bi isto trebalo biti dobro, bar se tako čini.

Kada bi se to moglo očekivat da će biti dostupno u našim trgovinama ?

[McG]

Možda krajem ove (ovisi o našim dućanima i zainteresiranosti), ali najvjerovatnije sljedeće godine.

[McG]

It seems that even though Core microarchitecture has been extremely successful, there is something about it that doesn’t quite satisfy the microprocessor giant any more. And these reasons are not superficial. Core processors have a lot of advantages, sell very well and are way ahead of the competitor’s solutions. It turns out that a serious drawback of Core microarchitecture that makes Intel very unhappy is their non-modular design. Being a continuation of the mobile Pentium M CPUs, Core 2 microprocessors were initially designed as dual-core semiconductor dies. When they started making multi-core Core 2 and Xeon solutions later on, they discovered several drawbacks of this approach. Increasing the systems performance by adding more processor cores to CPUs and more processors to the systems would have sooner or later brought Intel to a dead end, despite the fact that contemporary Core microarchitecture seemed very successful overall. That is why Intel is working real hard to switch to new Nehalem microarchitecture.

The actual microarchitecture consists only of a few building blocks that will be used to form a processor at the final design and production stage. This set of building blocks includes a processor core with an L2 cache, L3 cache, QPI bus controller, memory controller, graphics core, etc. The Bloomfield CPU we are going to discuss fairly soon consists of four cores, an L3 cache, a memory controller and one QPI bus controller. Server processors with the same microarchitecture that should be announced in early 2009 will have up to eight cores, up to four QPI bus controllers for multi-processor systems, L3 cache and a memory controller. The upcoming budget Nehalem processors scheduled to come out in H2 2009 will have two cores, a memory controller, a graphics core and DMI bus controller connecting the processor directly to the South Bridge.

Advanced Processor Core
Nehalem has the same number of the same decoders. However, Macrofusion technology did change significantly. First of all, there are more pairs of x86 instructions decoded “at one fling” within this technology. Secondly, Macrofusion technology in Nehalem processors works in 64-bit mode, while in Core 2 processors it could only be activated when the CPU worked with 32-bit code. So, CPUs with new microarchitecture will be able to decode five instructions per clock instead of four in a larger number of cases than their predecessors.

New processor cores support SMT technology and can simultaneously process up to two computational threads that require resource sharing. New processors with Nehalem microarchitecture should benefit even more from SMT. Firstly, they have memory subsystem with much higher bandwidth that can much better supply two computational processes with data. Secondly, Nehalem boasts “wider” microarchitecture that allows processing more instructions simultaneously. When SMT is enabled, all other resources are shared dynamically between processor threads or shared 50-50.





TLB and Cache-Memory
Intel engineers have significantly increased the size of the TLB (Translation-Lookaside Buffer). As you know, TLB is a high-speed buffer used to map over the physical and virtual page addresses. By making the TLB bigger they increase the number of memory pages that can be used without additional costly modifications employing address translation tables stored in regular memory. Moreover, TLB of Nehalem processors became dual-level. In fact, Intel simply added another L2 buffer to the TLB inherited from Core 2 processors. The new L2 TLB is not only large and can save up to 512 entries, but also boasts relatively low latency. Also, the new L2 TLB is unified and can translate page addresses of any size.

Nehalem microarchitecture allowing processors with up to 8 cores, doesn’t have a shared L2 cache any more. Each core gets its own L2 cache of relatively small size: 256KB. Nehalem also acquired L3 cache, which connects all cores and is shared. As a result, L2 cache turns into a buffer when processor cores send their requests to pretty big shared cache-memory.





SSE4.2 Instructions
Intel continued increasing the number of supported SIMD instructions in their new Nehalem microarchitecture. They added a set of seven new instructions called SSE4.2. Intel specifically stressed that the new SSE4.2 instructions are designed not that much for the processing of streaming media content, but for slightly different things.



Integrated Memory Controller
The main feature of Nehalem processors memory controller is its flexibility. Keeping in mind the modular design of the entire upcoming processor family, that may include solutions differing dramatically in features and market positioning, Intel foresaw the opportunity not just to enable or disable buffered modules, but also to vary the memory speed and the number of channels. The first processors with Nehalem microarchitecture will be quad-core models and they will have a triple-channel memory controller supporting DDR3 SDRAM. This way, desktop systems built on new CPUs will boast unprecedented memory subsystem bandwidth. With three DDR3-1067 SDRAM modules it will reach 25.6GB/s.





QPI Bus
Nehalem microarchitecture is universal, it should be used for desktop and mobile as well as server solutions. That is why Intel designed a new processor bus that could suit for multi-processor systems and provide sufficient bandwidth and scalability. On the technical side, QPI consists of two 20-bit links transferring data forward and back. 16 bit are assigned for data and the remaining 4 bits serve some auxiliary purpose: they are used by the protocol and error correction. This bus performs maximum 6.4 mln transfers per second (GT/s) and has 12.8GB/s bandwidth in each direction, or 25.6GB/s total bandwidth.

Depending on their market positioning, processors on Nehalem microarchitecture may come equipped with one or multiple QPI interfaces. As a result, each CPU in the multi-processor system may be directly connected to all other processors to reduce the latency when working with the memory connected to another controller. CPUs for single-processor desktop systems will have one QPI connecting it to the chipset.



Power Management and Turbo-Mode
Power Control Unit is actually just another programmable micro-controller built into the CPU that should manage power consumption intelligently. No wonder that PCU is of pretty complex design: it consists of about 1 million transistors. PCU’s main task is to adjust the frequency and voltage of individual cores and it has everything it takes for that. It receives the sensor readings of temperatures, voltage and current for all cores. PCU analyzes these data and switches qualifying cores to power-saving mode by adjusting their frequency and voltage. Namely, PCU may disable inactive cores and put them in deep sleep state where their power consumption will be close to 0.

According to Turbo Boost Technology main principle, the overall processor power consumption and heat dissipation lowers when some cores go into power-saving mode, which allows increasing the frequencies of other cores without risking to get past the TDP limits. Turbo-mode doesn’t necessarily get enabled when one or more cores go into power-saving mode.

First mass production processors based on new Nehalem microarchitecture will be desktop processors codenamed Bloomfield. They will have four cores. Besides these four cores the Bloomfield processor die will also contain 8MB L3 cache, triple-channel memory controller supporting DDR3 SDRAM and one QPI interface. The CPU like that will consist of 731 mln transistors and will be manufactured with 45nm process using high-k dielectric metal gates. Bloomfield processors will be marketed as Core i7. The first models due to come out in mid November will work at 3.2, 2.93 and 2.66GHz frequencies and the typical heat dissipation of all three will be set at 130W.



Izvor: X-Bit Labs

[anidra]

Autor Skorn

dakle ovo znači da neće biti ništa od klokanja Nehalema. a ionako je pušiona za igre.
preskačem ovu rundu i čekam Sandy Bridge ili novog AMDa

pogledaj si ovo:
http://www.guru3d.com/article/core-i...rmance-review/

[Jerry]

I Nehalem ima TLB bug!
Bas me zanima da li ce biti pluvanja po Nehalemu zbog ovoga kao sto je bilo po K10.

"In rare instances, improper TLB invalidation may result in unpredictable system behavior, such as system hangs or incorrect data. Developers of operating systems should take this documentation into account when designing TLB invalidation algorithms. For the processors affected, Intel has provided a recommended update to system and BIOS vendors to incorporate into their BIOS to resolve this issue."

http://www.fudzilla.com/index.php?op...10707&Itemid=1

[^SuperUnknown^]

Buahah, ionak se prvi macici bacaju u vodu

[Jerry]

Autor ^SuperUnknown^

Buahah, ionak se prvi macici bacaju u vodu

Mislim da se s tobom nece bas sloziti ekipa koja je za novu platformu izvojila 1000-1500$.

[^SuperUnknown^]

Ko im kriv Da platforma ne znam kako razara nebih jos isao na nju dokle god DDR3 ne dodje na neke normalne cifre...

[Emperor]

Ekipa koja je potrosila tolku lovu ,se ne želi pomiriti sa time da su bacili novac u vjetar.

Ko im je kriv kad žele imati prvi u selu.

Tako je sa večinom stvari pa i nevezano za računala,prve revizije su obično uvijek pune grešaka,bugova i visoke su cijene.

[McG]

MSI X58 Eclipse motherboard might have impressed you. Now, the details of MSI X58 Eclipse’s suped-up edition — MSI Eclipse Plus are leaked out at Syndrome-OC. From what we can see, all the heat sinks are black-colored, and the cooling area of southbridge has been enlarged. The number of heat pipe between southbridge and northbridge has been changed to one. The SATA connectors are also moved to the side face, which leaves plenty of room. The debug light is fixed at the left side of the motherboard. The Eclipse Plus has integrated with NF200 chip, and it features 4 PCIe X16 slot, supporting SLI and CrossFire. As of now, MSI hasn’t officially announced the launch date or pricing of this motherboard. But considering the participation of NF200, it won’t be a surprise if Eclipse Plus is much more expensive than Eclipse edition.

Izvor: Expreview

[stef]

Ako je netko pomislio da ASRock neće izdati svoju X58 ploču, gadno se prevario




http://www.asrock.com/mb/overview.as...erComputer&s=n

[SRV]

Odlicno izgleda, moram primjetit.