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McG
Datum registracije: Feb 2014
Lokacija: Varaždin
Postovi: 8,175
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Citiraj:
AMD Zen 6 could give X3D CPUs up to 240MB of cache
Citiraj:
AMD is seemingly capable of drastically increasing the cache capacity of its upcoming Zen 6 chips using stacked 3D V-Cache layers. AMD is reportedly bringing some big changes with its next-gen Zen 6 architecture, offering more cores and cache per CCD (Core Complex Die). The brand is seemingly capable of stacking its 3D V-Cache layers to boost the total available L3 pool, which could drastically boost performance in cache-sensitive tasks. Upcoming Ryzen CPUs are getting more exciting with each new rumour.
AMD has boosted the amount of cache on each 3D V-Cache layer to 96MB, up from 64MB on Zen 5. The brand is also planning a redesign of its chiplets, packing up to 12 cores inside each, giving access to up to 24 cores on consumer desktops and laptops. This should allow Team Red to offer single-CCD Ryzen CPUs with 144MB of L3 cache in total, comprised of 48MB (4MB per core) inside the CCD and 96MB on the 3D layer. On top of that, AMD is seemingly able to stack two of these 3D V-Cache layers, bringing the L3 total to 240MB (96 + 96 + 48). Note however, that these 2-Hi X3D variants may be exclusive to the professional segment (Threadripper / EPYC), especially if in-house testing doesn’t show a lot of benefits for regular users and gamers. What is sure according to the source, is that AMD is definitely capable of launching a gaming chip with 240MB of L3 cache. Perhaps the best option is to let users choose for themselves by launching regular Zen 6 processors alongside single and dual-layer 3D V-Cache variants.
Sources inside AMD have also indicated that the brand expects Zen 6 to deliver between 6% and 8% FP IPC (Floating Point Instructions Per Cycle) uplift compared to Zen 5. That said, this IPC isn’t final yet as it doesn’t take into account Zen 6’s gaming capabilities and PPC (Performance Per Clock) uplifts. The take here is that this FP IPC isn’t to be confused with the overall gen-to-gen improvement which is likely to be higher. Aside from these big changes, Zen 6 is also set to debut a new bridge-die interconnect which is said to reduce the latency of chiplet-to-chiplet communication, potentially enhancing it to a level where dual-CCD CPUs are no longer an issue for games. There will also be a new I/O die that could boost DDR5 support even higher. Considering all of this, Zen 6 is shaping up to be a great option for gamers, and we can’t wait to try it.
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Izvor: Club386
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Citiraj:
AMD sampling next-gen Ryzen desktop "Medusa Ridge," sees incremental IPC upgrade, new cIOD
Citiraj:
AMD is reportedly sampling its next-generation Ryzen desktop processor powered by the "Zen 6" microarchitecture, codenamed "Medusa Ridge," to close industry partners, such as platform designers and OEMs. The processor sees AMD update both the CCDs and client I/O die. AMD confirmed that it is building the "Zen 6" CCD on the TSMC N2 (2nm) node, which entered risk production earlier this year. The node is expected to be ready for mass-production of 2nm chips later this year. The 2nm node presents a significant jump in transistor densities from the current TSMC N4P node on which AMD builds its 8-core "Zen 5" CCD, that AMD will use to increase CPU core counts per CCD.
Sources point to the possibility of AMD increasing core counts per CCD to 12, and giving the CCD 48MB of L3 cache. At this point we don't know if all 12 cores will be arranged in a single CCX with a monolithic slab of 48 MB L3 cache, or if there's a dual-CCX layout with 6 cores per CCX sharing 24 MB of L3 cache, each. The other big upgrade with "Medusa Ridge" is its client I/O die (cIOD). AMD is expected to build its new generation cIOD on a newer EUV node such as 5nm N5 or 4nm N4P, a significant upgrade from the current 6nm N6. 1usmus says that the biggest reason for AMD to update its cIOD is the memory controller architecture. AMD is expected to give "Medusa Point" a new dual memory controller architecture. There are still two DDR5 channels per socket, but this is redesigned for increased memory speeds, letting AMD catch up with Intel in this area.
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Izvor: TechPowerUp
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Citiraj:
AMD Zen 6 targets 7GHz clock speeds
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Zen 6 marks one of AMD’s most aggressive generational leaps in recent history, the company is internally testing desktop CPUs that already reach 6.4GHz, with the ultimate performance target set “above 7 GHz.” These chips codenamed Olympic Ridge will be based on the N2X node, an enhanced version of TSMC’s 2 nm process, and represent a significant jump from the current Zen 4 lineup built on N4P. The move from N4P to N3P to N2P and finally to N2X spans three full node transitions. For comparison, AMD moved from Zen+ (12nm) to Zen 2 (7nm) and later to Zen 4 (5nm), with each step yielding substantial gains in efficiency and clock headroom. If successful, Olympic Ridge would exceed the 5.7GHz peak of Zen 4 and potentially outperform current top-end Intel Raptor Lake Refresh CPUs in single-threaded workloads.
However, it is important to note that this 7GHz target applies only to the desktop-class N2X-based variants. Most Zen 6 products, including the Medusa Point APU platform and Venice-class EPYC processors, will use the more mature N2P or N3P nodes. These parts may not match Olympic Ridge in raw frequency, but they are still expected to bring notable improvements in efficiency and performance-per-watt. AMD is likely concentrating its highest clocks on AM5 desktop SKUs and possibly a few select server models. Laptop-class APUs, such as Medusa Halo, are expected to top out at around 6.2 to 6.5GHz, still representing a 20% uplift over current-generation mobile parts. While clock speed alone does not determine overall performance, AMD’s attempt to break the 7 GHz barrier reflects its aggressive roadmap and willingness to adopt bleeding-edge manufacturing processes.
If achieved, a 7GHz Zen 6 desktop CPU would be the fastest clocked x86 processor ever released by AMD and potentially a landmark product in the desktop performance race. While final shipping frequencies are still unknown, internal testing and sourcing suggest AMD is on track to deliver a major leap with Olympic Ridge.
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Izvor: Notebookcheck
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AMD CEO Lisa Su says US-made TSMC chips cost up to 20% more – but they're worth it
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AMD boss Lisa Su has confirmed something that we've been hearing for years now: buying chips from TSMC's US plants will be 5-20% more expensive than purchasing the same silicon from its Taiwan fabs. Su added that AMD expects its first chips from TSMC's Arizona facilities by the end of the year, and that the extra expense is worth it. Speaking in an interview with Bloomberg Television after her appearance at an AI event in Washington, Su highlighted the increased price of US-made TSMC chips compared to those from its Taiwan factories. It's no secret that building and running a cutting-edge fab costs more in the US, especially during the initial start-up period. People, concrete, permits, and the whole supporting ecosystem are pricier and less mature than in Taiwan, meaning a higher per-wafer cost.
Su says that paying the extra money is worth it as it means AMD is diversifying the crucial supply of chips. This will make the semiconductor industry less vulnerable to the type of disruption it experienced during the pandemic-induced chip crisis. "We have to consider resiliency in the supply chain," she said. "We learned that in the pandemic." Su also said that the yield rates of TSMC's Arizona plants were already comparable to its fabs in Taiwan. We heard back in January that TSMC's Arizona fab was already producing AMD Ryzen 9000 chips. The company also confirmed in April that the fifth-generation EPYC Turin chips had been "brought up and validated" in Phoenix, though volume shipments aren't expected until later this year.
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Izvor: TechSpot
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AMD Ryzen 9000 CPU with 16 Zen5 cores, 192MB of L3 cache and 200W TDP reportedly on the way
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AMD is preparing to launch a Ryzen CPU based on the Zen 5 architecture with a higher TDP than current models and significantly larger L3 cache. According to the leak, two models are planned, both based on the Granite Ridge architecture (Zen 5) and featuring increased cache. The 8-core version is said to have a 120W TDP and 96MB of L3 cache. This configuration matches that of the Ryzen 7 9800X3D, suggesting it could be a lower-tier variant (possibly 9700X3D), which AMD typically releases later. More attention is on the 16-core version, reportedly featuring a 200W TDP, which is 30W higher than both the 9950X and 9950X3D. Importantly, it allegedly includes 192MB of L3 cache, indicating a dual CCD layout, each with 32MB standard cache and 64MB of 3D V-Cache. Reading between the lines, this suggests AMD may have decided, or is still evaluating, the possibility of launching its first desktop Ryzen CPU with dual 3D V-Cache dies. AMD previously stated that such configurations are expensive to produce, which is why they haven’t been released before.The current top model combines one CCD with 3D V-Cache and one without, requiring users to toggle between gaming and non-gaming modes, effectively disabling one chiplet during certain workloads.
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Izvor: VideoCardz
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Citiraj:
AMD’s next-gen AM6 socket to feature over 2100 pins, may support AM5 coolers
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Bits and Chips shared some interesting information from their sources. Apparently, despite increasing the pin count for AMD’s next-next-gen desktop CPUs, the socket size may remain similar enough to support existing coolers. According to the site, the total pin count will exceed 2100 pins (22% more than AM5). The socket is said to be similar in size and layout to the existing AM5 socket, which also suggests AMD is not moving away from its current LGA design. If you are aware of the recent developments around AMD's Zen 6 processors, you might know that it is expected to utilize the AM5 socket, extending the lifespan of the platform even further. AM6 reportedly launches in 2028 alongside Zen 7.
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Izvor: Bits and Chips
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AMD posts record $7.685 billion revenue despite massive inventory charge
Citiraj:
AMD on Tuesday published its financial results for the second quarter of its fiscal 2025, posting revenue of $7.685 billion, which is its highest quarterly revenue ever. The company's results were driven by a significant uptick in client CPU sales and strong sales of its data center processors. But at the same time, the company's results were partially offset by the $800 million hit from Instinct MI308 GPU export restrictions to China. AMD's revenue for Q2 FY2025 reached $7.685 billion, marking a 32% year-over-year (YoY) and 3% quarter-over-quarter (QoQ) increase. The company's net income totaled $872 million, up 229% compared to the same quarter a year ago, and 23% sequentially. However, as a consequence of the $800 million writeoff, AMD's gross margin dropped to 40%, down from 49% YoY and from 50% QoQ.
For Q3 2025, AMD expects revenue of approximately $8.7 billion ± $300 million, representing around 28% year-over-year and 13% sequential growth at the midpoint, and another record quarter for AMD. This outlook reflects strong demand for AMD's AI accelerators as the company expects its Instinct MI350-series to ramp in Q3, EPYC server processors, and client products due to start of the back-to-school season and stockpiling for the upcoming Christmas season, though it excludes any potential revenue from Instinct MI308 GPU shipments to China, as export license applications remain under U.S. government review. While Q3 is traditionally good for AMD's gaming segment as console makers Microsoft and Sony increase purchases of SoCs for their products, this time around, AMD expects flattish revenue.
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Izvor: Tom's Hardware
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AMD Ryzen 9 9950X | Noctua NH-U12A chromax.black | MSI MAG B650 Tomahawk Wi-Fi | 128GB Kingston FURY Beast DDR5-5200 | 256GB AData SX8200 Pro NVMe | 2x4TB WD Red Plus | Fractal Define 7 Compact | Seasonic GX-750
AMD Ryzen 5 7600 | Noctua NH-U12A chromax.black | MSI MAG B650 Tomahawk Wi-Fi | 128GB Kingston FURY Beast DDR5-5200 | 256GB AData SX8200 Pro NVMe | 2x12TB WD Red Plus | Fractal Define 7 Compact | eVGA 650 B5
Zadnje izmijenjeno od: The Exiled. 06.08.2025. u 12:26.
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29.03.2025., 15:12
