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In order to lower the cost to against AMD, Intel announced to release native 2MB L2 Conroe in Feb 2007. Similarly, Merom will also get native 2MB L2 cache version at the time of Santa Rosa release. The existing Intel Core 2 Duo and Xeon 3000 in the market, actually, are native 4MB L2 processors. Although they have 2MB L2 and 4MB L2 versions, the 2MB one is made by only disabling half of the L2 Cache.

Its stepping would improved from B2 to L2. They have new SSPEC and MM, and CPUID would changed from 6F6 to 6F2. However, the change would not affect those manufacturers as well as end users. As 4MB L2 Cache shared almost 60% of the transistors in Conroe, a cut to native 2MB L2 Cache may help in lower 20% of the cost. In fact, the L2 stepping samples have been sent to mainboard manufacturers in order to update the microcode for BIOS.

Besides Quad Core Intel Core 2 Extreme QX6700 upcoming in Nov 2006, there is a cheaper version of Quad Core coming in Jan 2007. This would be Intel Core 2 Duo Q6600 (2.4GHz/4MB x 2/1066MHz FSB).

Intel recently announced to manufacturer that the upcoming 1333MHz FSB Conroe now belongs to new Core 2 Duo 6050 family, releasing at the same time as X38 (Bearlake X). 1333MHz FSB Conroe is also manufactured by 65nm process and using LGA775 interface. So, everything is the same besides the FSB and a new function added. In addition, when Intel Core 2 Extreme QX6700 has been launched, the original Core 2 Extreme X6800 would be renamed to Core 2 Duo E6800. Nothing is changed, but the clock multiplier is now locked. This change would be found in 1H 2007.

i915 Chipset

Izvor: DailyTech i HKEPC