AMD Is Working On A Powerful Milan CPU Variant With 15 Tiles
BTW tko ne zna Milan je Zen 3 epyc (Napoli je zen1, a Rome zen2)
Još je sfera glasine, ali izgleda da pokušavaju nešto sa HBM čipovima uz core i I/O die čipove
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Long story short, this means, unless AMD chooses to delay this variant till DDR5, you are looking at either an 8+6+1 configuration (CPU + HBM + IO) or a 10+4+1 configuration (CPU + HBM + IO).
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