Intel nažalost kao i s mnogim drugim stvarima u posljednjih par desetljeća, kompletno mora promijeniti način razmišljanja implementiranja novih arhitektura i popratnih tehnoloških rješenja.
Would 3D V-Cache Help Intel CPUs?
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AMD can get greater bandwidth and power efficiency out of TSVs, but also stack multiple chiplets high if needed. TSVs can carry power and data, but you still have to design around the two for cross signaling. Intel’s Foveros technology, while it is also 3D stacking, it relies on microbumps between the two chiplets. These are bigger and power-hungry, but allow Intel to put logic on both the lower die and upper die. The other element is thermals – usually you want the logic on the top die to manage the thermals better as it is close to the heatspreader/heatsink, but moving logic further away from the substrate means that power has to be transported up to the top die. Intel is hoping to mix microbumps and TSVs in upcoming technologies, and TSMC has a similar roadmap for the future for its customers.
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Izvor: AnandTech
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I ovo je članak iz 2021., a AMD je u međuvremenu poboljšal i unaprijedil 3D cache implementaciju, dok Intel nije ulovil ni onaj prvi vlak sa 5800X3D.