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The Exiled · 28.09.2022., 14:36

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Autor zvonac

Kao sto neko vec rece ovdje, opustili su se dobrano, a sad ce brati gorke plodove svog opustanja, srecom pa imaju love, pa si dozvoljavaju pokusaje i promasaje, ipak je to intel, kaj ne.

Da, mada im neograničene financije više nisu kaj su nekad bile, pa se fino nepovratno potrošilo i sad idu istim putem kojim je konkurencija krenula prije pet godina.

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AMD was right about chiplets, Intel's Gelsinger all but says

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According to Gelsinger, and anyone else paying attention to chip fabrication, we’re approaching the limits of what can be practically achieved on a single die. “Even Gordon Moore, when he wrote his original paper on Moore’s law, saw this day of reckoning where we’ll need to build larger systems out of smaller functions, combining heterogeneous and customized solutions,” said the chief exec. Intel is betting on its packaging technology and heterogeneous dies – placing different types of dies in a single processor package, all connected up internally – to keep Moore’s law alive a little bit longer. You tend to get better manufacturing yields when making lots of smaller dies, versus big monolithic ones, among other benefits.

This is just what, for one, AMD has been doing for years successfully, and arguably helped fuel its rejuvenation as a supplier of x86 chips. AMD has been packing multiple dies of Zen CPU cores and IO circuitry into individual processor packages, selling them as its Ryzen PC and Epyc server chips – the dies, aka chiplets, being made mostly by TSMC and some by GlobalFoundries, depending on the model. Not to mention Nvidia and Apple are also moving to multi-die packages, each in their own way. The (Sapphire Rapids) Xeons take a cue from AMD and adopt a multi-die, aka chiplet, packaging technique. Presumably this was done to overcome yield issues and push core counts higher, another sore spot for Intel, which has trailed its x86 and Arm rivals in core count for several generations. Sapphire Rapids is also Intel’s first datacenter chip to support PCIe Gen 5.0, Compute Express Link, DDR5 memory, and HBM.

Izvor: The Register