[The Exiled]

AMD's next compute GPU could have two dies and 128 GB of memory

Aldebaran, the computer part, has appeared a few times in Linux patch notes. Its two-die design was half-implied in February and confirmed last month: "on Aldebaran, only primary die fetches valid power data. Show power/energy values as 0 on secondary die", one note reads. It’s the first AMD Accelerator/GPU to leverage an MCM (multi-chip module) design, a technique that’s been plastered on patents for years but has only just begun to materialize. Using multiple chips/dies connected closely allows for more scalability than traditional monolithic designs, but also reduces the per-compute unit performance of a card, particularly in poorly parallelized workloads. nVidia is expected to challenge Aldebaran with their own MCM designs based on the Hopper architecture next year. Intel, meanwhile, is on the verge of releasing the Ponte Vecchio accelerator based on the Xe HPC architecture and an early MCM implementation. Like Ponte Vecchio, Aldebaran leverages MCM to expand memory capacity, patch notes imply. A note from last week describes Aldebaran as having two dies, four UMCs per die, and eight channels connected to 2 GB of HBM per UMC or 128GB, in total. The patch notes also mention support for a "new HBM2 memory type," presumably HBM2e. If AMD is using SK Hynix’s new HBM2e memory modules with 3.6 Gbps of bandwidth and a 4096-bit bus on each die, then Aldebaran could have 3.6 TB/s of memory bandwidth. AMD CEO Dr Lisa Su has already said that the CDNA 2 architecture, meaning Aldebaran, is slated for release later this year. Presumably, it will release as the MI200 Accelerator.

Izvor: TechSpot