[Manuel Calavera]

Overall, our estimate for Zen is fairly close to the score for Intel’s Ivy Bridge but short of Haswell’s and Skylake’s. AMD argues that the Intel products receive an unfair 5–10% boost because the company compiles to 32-bit x86 code, which is unrealistic for many applications. Adjusting by 10% would put Zen about halfway between Ivy Bridge and Haswell for SPECint_rate2006. Either way, Zen delivers a tremendous improvement in per-core performance.

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Good for Servers But Not HPC

The Zen core does have some limitations that make it less suitable for scientific computing, which accounts for 15–20% of the server market. It sacrifices floating-point and SIMD throughput to reduce area and power—important metrics for this segment. As Table 1 illustrates, Zen offers more FP flexibility than Sandy Bridge and will deliver much better performance on SSE code. Haswell and Skylake, however, provide twice the flops per clock using AVX FMA instructions and, more importantly, twice the cache bandwidth to feed the FP and SIMD execution units.

The forthcoming server version of Skylake will further double the computational throughput using AVX512 and also increase the cache bandwidth. Practically, Zen will therefore struggle to offer competitive HPC performance both for classic scientific computing and for workloads such as machine learning that require dense computations. Fortunately for AMD, the bulk of the server market is running databases, web servers, and other tasks that fall outside scientific computing.

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In servers, Zen could enable midrange and low-end designs with the right complementary components (e.g., L3 cache, memory, and PCIe controllers) in 2017. Most of the server market today comprises two-socket designs, and AMD has demonstrated a two-socket server employing the 32-core Naples processor. Given that Naples will arrive shortly after Summit Ridge, we suspect both products will use the same die, but the server product will use a multichip package, an approach AMD uses in its current Opteron products. The inherent latencies of a multichip approach would require customers to tightly control the locality of their workloads. That would make Naples a good fit for mega-data-center customers such as Amazon, Baidu, and Google.

Naples includes more cores than we expect from Intel’s 28-core Skylake-EP, but we think Intel will still have better performance and power efficiency. If AMD can come within 20% of Intel, however, customers will happily buy quite a few chips and reopen the server market. Given that AMD’s market share in servers is nearly nonexistent, even a few design wins at large data center customers could make a big difference—particularly in AMD’s revenue.

http://www.linleygroup.com/mpr/article.php?id=11666

Malo mi je prestručno za detaljnije čitanje, više n00b friendly ima na wccf (still datum članka )