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It is worth pointing out that it was the same pub which initially stated that the flagship would be limited to 4GB due to a technical limitation – something we pointed out as inaccurate in our article. The GPU will be using an interposer to stack the die in a 2.5D fashion so size of upto 2000mm^2 (for the interposer) are possible with 8GB being a laughably easy amount to achieve. Ofcourse it goes without saying that if AMD choses to go with high density PKG, the yield of said component would be lower than the lower density variants which net 4GB in the same footprint.
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I ovdje detaljnije:
Is AMD’s R9 390X Limited to 4GB of Memory ? Let’s Find Out - jeben članak (ima i o nvidijinim pascalima)
- 1GB memory module runs at a 1Ghz clock speed but is capable of 128GB/S bandwidth. So even though the memory only runs at a clock speed of 1Ghz / 1Gbps which is significantly lower than what GDDR5 is capable of today. HBM still delivers significantly more bandwidth, up to 9 times more. This is because while each GDDR5 memory module only requires 32bit wide interface, each HBM module requires a 1024bit wide interface which is used to transfer data.
As we’ve discussed above, each 1GB cube of HBM delivers 128GB/S of bandwidth through a 1024bit wide interface. So AMD would need to design Fiji XT with a 8192bit memory interface to leverage the bandwidth of 8 HBM cubes. The issue here believe it or not is that 8GB of HBM equate to 1 Terabyte of bandwidth. And for a GPU like Fiji XT with 4096 stream processors half of that bandwidth would go to waste. So from a logical standpoint it would make no sense for AMD to design a GPU that can’t utilize more than half of the available bandwidth.
The leaked specifications suggest that Fiji XT actually has a more reasonable 4096bit memory interface and 4GB of HBM running at 1.25Gbps. Which would deliver 640GB/S of bandwidth, more than enough to feed a 4096SP GPU. There are however two viable methods which AMD can use to double the memory for the R9 390X from 4GB to 8GB. The first would be to simply double the number of HBM cubes from 4GB to 8GB. If Fiji XT does indeed have a 4096bit interface this would ensure a doubling in capacity at a constant 640GB/s bandwidth because every couple of HBM cubes would have to share one 1024bit wide memory slice.
The other method by which AMD can double the memory capacity would be to use HBM cubes with double the density, i.e. 2GB cubes instead of 1GB cubes. Currently, first generation HBM only comes in 4-Hi 1GB cubes. However Hynix plans to introduce new iterations with larger capacities per die as well as more stacked dies per cube. Both of those solutions would enable AMD to introduce GPUs with more VRAM, even up to 16GB, while maintaining that same 4096bit interface at 640GB/S.
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