| The Exiled |
17.12.2022. 14:46 |
Citiraj:
Autor stef
(Post 3645811)
Zanimljiv je info s porezom na uvezene poluvodiče koji stupa na snagu valjda nakon Nove.
|
Citiraj:
Autor The Exiled
(Post 3645820)
Da, budemo vidjeli kaj bude na kraju ispalo iz RDNA 3 priče i situacije.:)
|
Nismo trebali dugo čekati, a izgleda da se MLID Tom i s ovom teorijom malo zaletil.
Citiraj:
GPU prices won't increase from tariffs - at least not for another nine months:kafa:
Citiraj:
The Office of the United States Trade Representative (USTR) has extended the tariff exclusions from "Section 301" on Chinese imports for nine months. The exemptions include 352 Chinese import categories, such as printed circuit boards (PCBs), used to fabricate the best graphics cards and other computer hardware. During the early stages of the China–United States trade war back in 2018, President Trump imposed tariffs on many imported Chinese products. In March of this year, the USTR temporarily lifted the Trump-era tariffs. However, the tariff exemption expires on December 31, likely impacting graphics card pricing in 2023. Fortunately, the USTR has decided to prolong the tariff exclusions for another nine months.
|
Izvor: Tom's Hardware
|
EDIT:
Citiraj:
AMD addresses controversy: RDNA 3 shader pre-fetching works fine:fiju:
Citiraj:
Reports that AMD's RDNA 3 GPUs have broken shader pre-fetch functionality aren't accurate, according to a statement that AMD issued to Tom's Hardware: "Like previous hardware generations, shader pre-fetching is supported on RDNA 3 as per gitlab link. The code in question controls an experimental function which was not targeted for inclusion in these products and will not be enabled in this generation of product. This is a common industry practice to include experimental features to enable exploration and tuning for deployment in a future product generation." — AMD Spokesperson to Tom's Hardware.
The other elephant in the room is AMD's use of an A0 stepping of the RDNA 3 silicon, which means this is the first physically-unrevised version of the chip. This has led to claims that AMD is shipping 'unfinished silicon,' but that type of speculation doesn't hold water. AMD didn't respond to our queries on whether or not it used A0 silicon for the first wave of RDNA 3 CPUs, but industry sources tell us that the company did use A0 silicon for Navi31. In fact, we're told the company launched with A0-revision silicon for almost all of the 6000 series and most of the 5000 series. This is not indicative of an 'unfinished product.' The goal of all design teams is to nail the design on the first spin with working, shippable silicon. nVidia, for instance, often ships A0 stepping silicon, too.
Nearly all complex chips have both known and unknown errata and bugs that are addressed with firmware, driver, and software workarounds that can reduce or eliminate those issues, and they ship that way — that's the very nature of modern semiconductor design and production. For example, Intel's Skylake generation of processors shipped with 53 known errata, and six months later, Intel listed another 40 errata. This is common because chip design cycles are long, often on the order of years, so there often isn't time to respin the chip to address minor issues. We see similar trends from other types and generations of processors, too. There are also many examples of chips that had issues in the design/verification process that require multiple steppings to come to market. For instance, Sapphire Rapids was last known to be on the 12th stepping, and it still hadn't shipped in volume (A0, A1, B0, C0, C1, C2, D0, E0, E2, E3, E4, and E5 steppings). Naturally, that has led to severe production delays and missed launch dates.
|
Izvor: Tom's Hardware
|
|
