AMD is yet to officially launch its Genoa data-center CPU series. The company also announced it is working on seperate series with 3D V-Cache and also density optimized Zen4c series. Both of those products have been included into the new, quite long, one should add, lineup of server CPUs. The naming convention for 9004 and 8004 series of Zen4 CPUs will be divided into two sockets: SP5 for 9004 series and SP6 for 8004. The new series will go range from 8 to 128 cores, but 112 and 128 configurations will be reserved to Zen4 based Bergamo CPUs. In fact, only the core count will tell customers if they are buying Bergamo or Genoa because the latter simply does not go above 96 cores.
Similarly to Milan-X, the upcoming Genoa-X series with 3D V-Cache will also carry the X moniker, differentiating it from P (1 socket) and F (high frequency) Genoa CPUs. Configurable TDP will vary from 200 to 400W depending on the model, however the high-core count and high-frequency variants are all above 290W. The EPYC 9754 “Bergamo” is to feature 128 Zen4C cores (with a stripped-down L3 cache) and up to 256 MB of L3 Cache. This CPU will boost up to 3.2 GHz and will have a TDP of 360W. With 16 cores fewer, there is EPYC 9734 with identical boost clock but also 40W lower TDP.
AMD is preparing four Genoa-X CPU, offering up to 96 cores, with the flagship part called 9684X featuring 96 cores and massive 1.1 GB of L3 Cache. This part has a TDP of 400W, which is the highest TDP from all 4th Gen EPYC CPUs.
The cloud-oriented lineup succeeding Bergamo will push the core counts as high as 160. In other words, up to 20 eight-core CCDs. That’s a sizable jump from the 128-core Bergamo chips (with 16 CCDs) set to land early next year. The successor to Bergamo will likely leverage the Zen 5c core with a stripped-down L3 cache and lower clocks. These cores will be fabbed eight on the TSMC N4 4nm or the N3 3nm process node, thereby allowing for higher logic densities. Moving to Intel’s roadmap, Sapphire Rapids-SP is slated to land later this year, followed by Emerald Rapids-SP in 2023 (but in reality, 2024). The former will top out at 56 to 60 cores (depending on yields) plus the HBM variants while the latter will allegedly increase it to 64, a far cry from the 96-core powered AMD EPYC Genoa processors. These two Xeon lineups will consist of Golden Cove and Raptor Cove cores fabbed on the 7nm node. Meanwhile, the Sierra Forest family featuring the Gracemont (E-cores) will pack up to 128 cores, putting up a healthy fight against AMD’s Bergamo offerings, that is if they actually launch the same year. The Xeon-next parts should double down on the core front too but it’ll be the launch schedule that will determine their competitiveness.
AMD at a special media event titled "together we advance_data centers," formally launched its 4th generation EPYC "Genoa" server processors based on the "Zen 4" microarchitecture. These processors debut an all new platform, with modern I/O connectivity that includes PCI-Express Gen 5, CXL, and DDR5 memory. The processors come in CPU core-counts of up to 96-core/192-thread. There are as many as 18 processor SKUs, differentiated not just in CPU core-counts, but also the way the the cores are spread across the up to 12 "Zen 4" chiplets (CCDs). Each chiplet features up to 8 "Zen 4" CPU cores, depending on the model; up to 32 MB of L3 cache, and is built on the 5 nm EUV process at TSMC. The CCDs talk to a centralized server I/O die (sIOD), which is built on the 6 nm process. The processors AMD is launching today are the EPYC "Genoa" series, targeting general purpose servers, although they can be deployed in large cloud data-centers, too. To large-scale cloud providers such as AWS, Azure, and Google Cloud, AMD is readying a different class of processor, codenamed "Bergamo," which is plans to launch later. In 2023, the company will launch the "Genoa-X" line of processor for technical-compute and HPC applications, which benefit from large on-die caches, as they feature the 3D Vertical Cache technology. There will also be "Siena," a class of EPYC processors targeting the telecom and edge-computing markets, which could see an integration of more Xilinx IP.
The EPYC "Genoa" processor, as we mentioned, comes in core-counts of up to 96-core/192-thread, dominating the 40-core/80-thread counts of the 3rd Gen Xeon Scalable "Ice Lake-SP," and also staying ahead of the 60-core/120-thread counts of the upcoming Xeon Scalable "Sapphire Rapids." The new AMD processor also sees a significant buff of its I/O capabilities, featuring a 12-channel (24 sub-channel) DDR5 memory interface, and a gargantuan 160-lane PCI-Express Gen 5 interface (that's ten Gen 5 x16 slots running at full bandwidth). and platform support for CXL and 2P xGMI links by subtracting some of those multipurpose lanes. The new 6 nm server I/O die (sIOD) has a significantly higher transistor count than the 12 nm one powering past-gen EPYC processors. The high transistor count is due to two large 80-lane configurable SERDES (serializer-deserializer) components, which can be made to put out PCIe Gen 5 lanes, CXL 1.1 lanes, SATA 6 Gbps ports, or even the inter-socket Infinity Fabric enabling 2P platforms. The processor supports up to 64 CXL 1.1 lanes that can be used to connect to networked memory-pooling devices. 3rd generation Infinity Fabric connects the various components inside the sIOD, the sIOD to the twelve "Zen 4" CCDs via IFOP, and as an inter-socket interconnect. The processor features a 12-channel (24 x 40-bit sub-channels) memory interface, which supports up to 6 TB of ECC DDR5-4800 memory per socket. The latest generation Secure Processor provides SEV-SNP (secure nested paging), and AES-256-XTS, for a larger number of secure VMs.
Each of the 5 nm CPU complex dies (CCDs) is physically identical to the ones you find in Ryzen 7000-series "Raphael" desktop processors. It packs 8 "Zen 4" CPU cores, each with 1 MB of dedicated L2 cache, and 32 MB of L3 cache shared among the 8 cores. Each "Zen 4" core provides a 14% generational performance uplift compared to "Zen 3," with clock-speed kept constant. Much of this uplift comes from updates to the core's Front-end and Load/store unit, while the branch predictor, larger L2 cache, and execution engine, make smaller contributions. The biggest generational change is the ISA, which sees the introduction of support for the AVX-512 instruction-set, VNNI, and bfloat16. The new instruction sets should accelerate AVX-512 math workloads, as well as accelerate performance with AI applications. AMD says that its AVX-512 implementation is more die-efficient compared to Intel's, as it is using existing 256-bit wide FPU in a double-pumped fashion to enable 512-bit operations.
AMD is launching a total of 18 processor SKUs today, all meant for the Socket SP5 platform. It follows the nomenclature as described in the slide below. EPYC is the top-level brand, "9" is the product series. The next digit indicates core-count, with "0" denoting 8 cores, "1" denoting 16, "2" denoting 24, "3" denoting 32, "4" denoting 48, "5" being 64, and "6" being 84-96. The next digit denotes performance on a 1-10 scale. The last digit is actually a character, which could either be "P" or "F," with P denoting 2P-capable SKUs, and "F" denoting special SKUs that focus on fewer cores per CCD to improve per-core performance. The configurable TDP of all SKUs is rated up to 400 W, which seems high, but one should take into account the CPU core-count, and the impact it has on the number of server blades per rack. This is one of the reason AMD isn't scaling beyond 2 sockets per server. The company's core-density translates into 67% fewer servers, 52% less power. In terms of performance, AMD only has Intel's dated 3rd Gen Xeon Scalable "Ice Lake-SP" processors for comparison, since "Sapphire Rapids" is still unreleased. With core-counts equalized, the 16-core EPYC 9174F is shown being 47% faster than the Xeon Gold 6346; the 32-core EPYC 9374F is 55% faster than the Xeon Platinum 8362; and the 48-core EPYC 9474F is 51% faster than the 40-core Xeon Platinum 8380. The same test group also sees 58-96% floating-point performance leadership in favor of AMD.
Zwer će se ugušiti od meltdowna, znači brutalna dominacija, veće performanse, manja potrošnja, više jezgri ma sve. I treba spomenuti serverski APU koji nekako prolazi ispod radara, brutalan proizvod :goood:.
MadBoY
11.11.2022. 08:43
I najbitnije od svega, već sad svi veći partneri imaju spremne konkretne proizvode/servere. Odlični procesori ali i odličan launch platforme.
The Exiled
11.11.2022. 09:11
Da i još k tome Intel za high-end 56-core Sapphire Rapids Xeon model traži ~13.000€, dok novi 96-core EPYC ide za ~11.000€.:):D
Dr. Strange
11.11.2022. 09:13
I Intelova HBM memorija ima znatno veće latencije od AMD-ovog 3d l3cache-a.
The Exiled
11.11.2022. 11:10
IMHO samo je pitanje vremena kad i AMD složi HBM EPYC modele, jer sve ostalo već nude. I onda imaju kompletnu ponudu, HBM + 3D cache na/u istom pakiranju, pa lako dalje skaliraju i segmentiraju.
HBM su ionak implementirali za (propala?:D) Vega čuda tehnike i koriste ih općenito za CDNA, a i onaj serverski APU koji su spomenul bude imal kombinaciju svega i svačega.:)
AMD plans for high-end desktop systems include “Storm Peak” platform as a Q3 2023 product. AMD is reportedly planning two product series based on the platform: HEDT and workstations. The HEDT series will support quad-channel memory and 64 PCIe Gen5 and 8 PCIe Gen3 lanes. Those products are said to support overclocking. Meanwhile, the 8-channel memory will be exclusive to workstation Threadripper platform (so likely Threadripper PRO). The series will see doubled PCIe Gen5 lane support up to 128, but it will not support overclocking for either the CPU or memory. Earlier rumors have suggested that Zen 4 desktop Threadripper platform could support up to 96 cores, so just as many as EPYC 9004 “Genoa” chips for servers. This would be, in fact, a very similar decision to Intel’s plans for the upcoming Sapphire Rapids Xeon 3400 and 2400 series. It is worth noting that AMD has two sockets for its Zen 4 EPYC products: SP5 and SP6. The former has already seen a formal introduction with EPYC Genoa 9004 series, while the latter is said to arrive later. The SP5 platform supports 160 PCIe Gen5 lanes and 12-channel DDR5 memory, while SP6 is believed to support 96 PCIe Gen5 and 6-channel memory.
Derived from AMD's standard EPYC 9004 chips for servers, the AMD EPYC Embedded 9004 processors are aimed at embedded applications such as automation, telecommunications, the Internet of Things (IoT), and edge computing; use cases where high power efficiency is a strict technical requirement. Coming with options in both 1P and 2P configurations, AMD's EPYC Embedded 9004 series processors feature up to 96 cores (192 threads) per chip, with up to 384 MB of L3 Cache and duodenary (12) channel memory controllers, which are capable of supporting DDR5-4800 ECC memory in RDIMM, NVDIMM-N, and 3DS RDIMMs flavors. AMD's EYPC Embedded processors are deployed for various applications and industries. One of the most profound use cases includes the industrial automation industry, where large computing power is required and can subsequently process large amounts of data in real time. Other industries requiring high-powered and highly efficient embedded solutions include the medical imaging industry, edge computing, networking, and telecommunications. Two critical requirements for embedded solutions are power efficiency and performance per watt, which is why the latest EPYC embedded 9004 chips must be fit for purpose.
As previously noted, the EPYC Embedded lineup also brings with it official support for NVDIMMs. One of the main advantages of NVDIMM-N over other types of NVDIMMs is its fast access time. Since DRAM is the primary memory, NVDIMM-N provides high-speed access to data, which is crucial for applications that require fast data access, such as databases and real-time analytics. With the the non-volatile flash storage available as a backup mechanism, NVDIMM-N can ensure that data not lost even during a power failure or system crash. NVDIMM-N also has a lower latency than traditional non-volatile memory, which means that data can be accessed quicker, even at full load, for critical industries such as Cloud storage, Networking, and Telecomms, and even in sectors such as Automotive; all of these are key target segments for the AMD EPYC Embedded 9004 solutions. And, of course, AMD's first generation of CXL support is available as well. With full CXL 1.1 support, Embedded EPYC processors can access volatile and non-volatile CXL.mem devices, expanding the number and types of memory options available to the platform.
After getting bruised in servers by AMD, Intel hopes to stop the bleeding in the server market with next year’s chip offerings. The difference-making products will be Sierra Forest and Granite Rapids, which are due out in 2024, said Dave Zinsner, chief financial officer at Intel, last week at the Morgan Stanley Technology, Media and Telecom conference. intel’s current server offering is a Xeon chip codenamed Sapphire Rapids. The chipmaker later this year will ship its successor, codenamed Emerald Rapids, which provides incremental performance upgrades. Emerald Rapids will be more of a bridge to the difference-making chips released in 2024, but it will not stop the market-share loss the company is taking from AMD. AMD has made the most of Intel’s delays and mismanagement of its server product roadmap, with chips like Sapphire Rapids being delayed multiple times. AMD’s next big chip release is Bergamot, which is coming out in the first half of this year. The chip is based on the same instruction set as Genoa, but with more cores and lesser frequency. It is targeted at dense servers.“It’s optimized for cloud native, so instead of a 96-core cluster, it’s 128 cores. It does not run at the same peak frequency of Genoa.”
Glavni ekonomist u Intelu priča kako se nadaju da će spriječiti AMD-ov daljnji napredak, posebice, ako se u obzir uzme činjenica da sve Intelove najave idu po planu i programu.:)
According to previously leaked marketing materials, AMD is set to reveal their next-generation Threadripper series this fall. As it turns out, we won’t have to wait for much longer, as the official launch date is right around the corner, scheduled for October 19th. The forthcoming launch is expected to target OEMs and SI (System Integrators), who will offer a range of systems based on both OEM and DIY motherboard designs utilizing the TRX50 chipset. This chipset is anticipated to be derived from the EPYC 9004 “Genoa” series, upon which the Threadripper is built. This translates to support for up to 96 Zen4 cores, up to 128 PCIe Gen5 lanes, and DDR5 compatibility.
Leaked slides suggest that AMD is claiming its upcoming series will deliver a 20% performance boost and indeed feature 96 cores. This isn’t entirely surprising, as leaks have already showcased the 96-core Threadripper 7995WX. It’s expected that this release will not only feature the highest core count ever in the high-end desktop (HEDT) market but also boast the fastest Threadripper CPU with a clock speed of 5.1 GHz. To achieve this, AMD had to increase the TDP from 280W (Zen3) to 350W for its new Storm Peak platform. While the DIY market launch is expected to be somewhat limited, AMD has made it clear that their primary focus is on high-end workstations rather than the gaming community. With the launch of the Threadripper 7000, AMD will be streamlining its portfolio by adopting DDR5 and PCIe Gen5 standards across its consumer, HEDT, and data-center product lines.
Up for testing today is an initial look at the Siena performance in the form of the EPYC 8324P and EPYC 8324PN 32-core parts for seeing how they stack up against 32-core Intel Xeon Scalable "Sapphire Rapids" performance. The EPYC 8324P has a 180 Watt TDP while the EPYC 8324PN has a 130 Watt TDP. The EPYC 8324P has a configurable TDP from 155 to 225 Watts while the Siena PN parts do not have a configurable TDP. The Xeon Gold 6421N is the main comparison point for today's benchmarking with this 32-core Sapphire Rapids processor having a 185 Watt TDP, 1.8GHz base frequency, and 3.6GHz turbo frequency.
Overall it was quite interesting to see the EPYC 8324P/8324PN with thirty-two Zen 4C cores still competing -- and at times outperforming in raw performance -- the Xeon Gold 6421N Sapphire Rapids processor that costs more and was also less power efficient. Even in power determinism mode the EPYC 8324P consumed significantly less power than the Xeon Gold 6421N competition... Across all of the benchmarks carried out the EPYC 8324P on average had a 89 Watt average with a 136 Watt peak, or in power determinism mode a 94 Watt average with a 168 Watt peak. Meanwhile the Xeon Gold 6421N had a 139 Watt average and 192 Watt peak. On average the Xeon Gold 6421N power consumption was 1.56x that of the stock EPYC 8324P or 1.93x of the EPYC 8324PN.
EPYC 8324P and 8324PN processors so far up against the equivalent Xeon Gold 6421N 32-core Sapphire Rapids processor, EPYC Siena is on track to deliver a compelling trifecta of performance, value, and energy efficiency for those looking at single socket servers and not needing to maximize the core count or density where Genoa and Bergamo come into play or for really driving HPC workloads where Genoa-X is able to deliver stunning results.
Threadripper PRO 7995WX was running around 46% faster than the Xeon Platinum 8480+ as the fastest Intel Sapphire Rapids part tested for this comparison. The only area where there was competition between the Intel Xeon and Threadripper PRO 7995WX was with TensorFlow where leveraging Sapphire Rapids' AMX capabilities. The performance of the Threadripper 7970X and 7980X was mind-boggling for single socket workstations and then for the HP Z6 G5 A to arrive days later with the Threadripper PRO 7995WX just went above and beyond to deliver mind-blowing performance for the professional workstation space. As shown by the many benchmarks there is plenty of real-world professional/creator software out there today that can make use of the 96 cores of DDR5 RDIMMs as well as benefiting from AVX-512 and other Zen 4 architectural improvements compared to prior Threadripper processors.
:chears::frend:
Disco
20.11.2023. 15:35
Samo 46% brži...mah, hard pass. :D
The Exiled
20.11.2023. 15:47
Zajeb je kaj 2.500$ 32C/64T Threadripper 7970X nudi performanse u rangu 56C/112T Xeon Platinum 8480+ modela koji košta ~10.000$.:):D
Disco
21.11.2023. 05:30
Pogledao sam rivju od Au Stevota i bome je imao dobar sex sa prošlim Tr-om.
Prvo im je MSI uvalio prototip ploče koja nikad nije išla u prodaju pa nije ni dobila update, pa su dobili drugu koja isto nije valjala, pa su dobili Asusovu na kojoj ne rade nV grafe i performanse su dosta degradirane....plus hrpetina sitnih problema.
Rekao je da mu je malo prisjeo preskupi proc koji baš i ne radi kako treba. :(
Ja def nisam kupac ovako nečeg, ali ne zvuči baš privlačno, pogotovo ne za 5k $ (vj 6k€ kod nas) samo za CPU...
The Exiled
21.11.2023. 07:31
Da, on je imal "problem s 5995WX procesorom" na temelju dvije sfušane ploče, a za zadnju ASUS kombinaciju je rekel da je radilo, ali nakon svega mu je već bilo dosta pizdarija.
ansha
21.11.2023. 09:18
Divno i krasno i daleko bolje od intelovih HEDT proizvoda al problem je sta vecinu stvari za koje ti treba hrpa jezgri danas neusporedivo brze odradjuju GPU-ovi...
The Exiled
21.11.2023. 09:34
Citiraj:
Autor ansha
(Post 3710947)
Divno i krasno i daleko bolje od intelovih HEDT proizvoda al problem je sta vecinu stvari za koje ti treba hrpa jezgri danas neusporedivo brze odradjuju GPU-ovi...
Kak je krenulo, AMD MI300 APU i nVidia Grace Hopper kombinacije budu začas i tome doskočile.
Citiraj:
AMD Instinct MI300 family is a modular building block architecture where AMD combines GPU, CPU, HBM, and more into a 3D stacked package.
Pa nemora se kupiti najjaci CPU , dovoljan je i 7955WX/7965WX da odradi sve sto treba u slucjau da se ide na GPU render, poanta je da i dalje imam plocu sa 7 full size 16x PCIe slotova, puno laneova za grafe i NVMe i ostale featurese...
Pa nemora se kupiti najjaci CPU , dovoljan je i 7955WX/7965WX da odradi sve sto treba u slucjau da se ide na GPU render, poanta je da i dalje imam plocu sa 7 full size 16x PCIe slotova, puno laneova za grafe i NVMe i ostale featurese...
Da, možeš fino iskombinirati kaj god te volja, a sad na isti LGA-6096 socket paše Threadripper 7000 serija, EPYC Genoa (X), Bergamo i MI300 APU modeli.
Tak da je samo pitanje vremena kad se sve skupa dokotrlja u nadolazeće mainstream mašine.:frend:
Aukcijska kuća od kojih uzimam ponekad. Office surplus. Informatička oprema, pogotovo ovakva specijalizirana ode često za male novce.
Ako nekog zanima, nek se javi, samo što uzimaju 25% + 10% + poštarinu na winning bid.
Pratim neke sitnice, pa mi je ovo upalo u oko.
Disco
22.11.2023. 14:35
Citiraj:
Autor The Exiled
(Post 3710935)
Da, on je imal "problem s 5995WX procesorom" na temelju dvije sfušane ploče, a za zadnju ASUS kombinaciju je rekel da je radilo, ali nakon svega mu je već bilo dosta pizdarija.
Pa šta nije za Asusa rekao da ne rade nV grafe i/ili da su performanse osjetno slabije i da je probao to popeglati i da je odustao nakon nekog vremena.
@Lewis: Si uzeo tog TR-a i koliko komada? :D
The Exiled
22.11.2023. 14:44
Je, između ostalog je i to spomenul, a sam ne zna u čemu je točno bila stvar, pa je sve skupa navel u kontekstu "problema s 5995WX procesorom".:):D
Lewis
22.11.2023. 15:14
Citiraj:
Autor Disco
(Post 3711277)
Pa šta nije za Asusa rekao da ne rade nV grafe i/ili da su performanse osjetno slabije i da je probao to popeglati i da je odustao nakon nekog vremena.
@Lewis: Si uzeo tog TR-a i koliko komada? :D
Ma jednog samo za sad, Workstation je na TR 3955wx, ostlao odradjuju grafe. A i nisam imao problema sa tom Asus wrx80 plocom i Nvidia grafama..
AMD EPYC Turin will be the 5th Gen EPYC lineup that replaces the 4th Gen EPYC family. The 4th Gen EPYC family is comprised of Genoa, Genoa-X, Bergamo & Siena CPUs which make use of Zen 4 & Zen 4C cores in EPYC 9004/8004 SKUs. The 5th Gen EPYC family will be similar, featuring a range of configurations and SKUs with Zen 5 "Nirvana" & Zen 5C "Prometheus" cores. The Zen 5 cores are expected to utilize the 3nm process node while Zen 5C may utilize the same or optimized variant. AMD EPYC Turin CPUs with Zen 5 Classic cores will offer up to 128 cores and 256 threads. There will be a maximum of 16 CCDs with 8 cores each, and each CCD will come with its own 32 MB of L3 cache. This will form up to 512 MB of L3 cache. This marks a 33 percent increase in core count and 33 percent increase in the total L3 cache count versus the Zen 4 based EPYC Genoa family.
AMD EPYC Turin CPU featuring the Zen 5C cores is where things get crazy with each Zen 5C CCD offering up to 16 cores and 32 MB of L3 cache. There will be six compute chiplets onboard these chips for a total of 192 cores and 384 threads with a slightly reduced 384 MB of L3 cache. The CPUs will retain the same I/O as the other classic chips. Compared to AMD's EPYC Bergamo CPUs based on the Zen 4C cores, the Turin chips with Zen 5C cores will offer a 50% increase in the number of cores and threads (192/384 vs 128/256) while offering the same uplift of 50% in the total cache count (384 MB vs 256 MB). Both Zen 5 & Zen 5C chips are expected to feature TDPs of 480W which can be configured up to 600W. The increase in computing capabilities will mark an incremental path to existing servers who can just drop in these chips on existing platforms and enjoy the added boost.
For its 5th Gen EPYC lineup, there are going to be two solutions. The 4nm version of Turin with up to 16 "Zen 5" CCDs, offering up to 128 cores and 256 threads, which is referred to as the "Scale-Up" variant while the second one is the "Scale-Out" variant which utilizes the 3nm "Zen 5C" cores with up to 12 CCDs, offering up to 192 cores and 384 threads. Turin packs up to 17 chiplets with a total of 150 Billion transistors for the full chip. The CPUs will come with AVX-512 support with a full 512b data path & up to 5 GHz clock speeds. Chips can be configured in 1P or 2P servers. In terms of IPC improvement, AMD states that Zen 5 delivers "exceptional uplifts" over the previous generation with up to a 17% increase for Enterprise and Cloud platforms and up to a 37% increase for HPC and AI platforms. The lineup scales from 8 cores to up to 192 cores and TDPs scale from 155W to up to 500W. As for the platform itself, AMD is relying on the same SP5 socket for both variants of Turin which makes it an easy drop-in upgrade from the previous Genoa and Bergamo "Zen 4" releases.
The platform still offers a 12-channel memory solution but now has DDR5 speeds configured up to 6400 MT/s with ECC support, 6 TB capacities per socket & you still get 128 PCie 5.0/CXL 2.0 lanes. New on Turin is support for PPR or Dynamic Post Package Repair for x4 and x8 ECC RDIMMs. On the security front, you get Trusted I/O, FIPS 140-3 in process, and Hardware Root-of-Trust support. The 5th Gen AMD EPYC "Turin" lineup will consist of a total of 27 SKUs which include the EPYC 9965 as the 192-core "Zen 5C" flagship, the EPYC 9755 as the 128-core "Zen 5" flagship, and the EPYC 9575F "Zen 5" chip as the first 5 GHz EPYC SKU. Moving to the details of the flagship SKUs, the AMD EPYC 9965 will feature 192 cores, 384 threads, and 384 MB of L3 cache. This chip will feature a 2.25 GHz base clock and a 3.7 GHz boost clock. The CPU will be configured at a default TDP of 500W and will be priced at $14,813 which is significantly lower than Intel's top Xeon 6900P offering which is priced at $17,800 US. That's a 17% higher price for Intel's flagship offering with 128 cores.
The EPYC 9755 which is based on the standard Zen 5 cores will come configured with 128 cores, 256 threads, 512 MB of L3 cache, a base clock of 2.7 GHz, a boost clock of 4.1 GHz, and a TDP of 500W. This chip will feature a price of $12,984 US which is again much lower than Intel's 6980P chip, marking a -27% difference. AMD also has several frequency-optimized variants in 64, 48, 32, 24, and 16 core flavors. The top part is the EPYC 9575F which offers 64 cores, 128 threads, 256 MB of L3 cache, a 400W TDP, a base clock of 3.3 GHz, and a boost clock of 5.0 GHz. This chip is priced at $11,791 US. Lastly, we should mention the entry-level 8-core SKU, the EPYC 9015, which is configured with a 125W TDP and has a base clock of 3.6 GHz, and a boost clock of 4.1 GHz and 64 MB of L3 cache. This chip will cost $527 US.
AMD is also outlying its EPYC platform to be used as an AI Host CPU for AMD Instinct and nVidia MGX/HGX platforms. The solution can be equipped with up to 8 OAM MI300X or MI325X GPUs & configurations that use the EPYC 9575F 5 GHz chip and can see up to a 20% performance increase in AI inferencing and up to 15% uplift in training. For nVdiia, the MGX solutions can be equipped with up to 16 AI accelerators (Hopper/Blackwell) and HGX configurations can get up to 8 accelerators with up to 2 EPYC CPUs. AMD & nVidia have announced a technical partnership, recommending a range of EPYC CPUs ranging from 32, 48, and 64 cores.
The tested AMD EPYC 9575F high frequency Turin 64-core processor, EPYC 9755 128-core Turin processor, and EPYC 9965 192-core Turin Dense processors dominated across the wide variety of server / technical computing / HPC workloads tested. The dual 128-core EPYC 9755 Turin processor was 40% faster than the dual Xeon 6980P Granite Rapids server with MRDIMMs. Even a single EPYC 9755 (and EPYC 9965) effectively matched the dual Xeon 6980P processors in this larger selection of benchmarks than what was initially run for Granite Rapids. The EPYC 9755 flagship Turin (non-dense) processor was 1.55x the performance of the 96-core EPYC 9654 Genoa processor. The EPYC 9965 192-core Turin Dense processor was 45% faster as well than the dual EPYC 9754 flagship Bergamo processor. These are some wild generational improvements.
Across all of the benchmarks, the EPYC 9965 had an average CPU power consumption of 275 Watts and a peak of 461 Watts, the EPYC 9575F had an average of 313 Watts and a peak of 403 Watts, and the EPYC 9755 had an average power consumption of 324 Watts with a peak of 500 Watts. The Xeon 6980P meanwhile had a 322 Watt average and 547 Watt peak. The tested AMD EPYC 9005 series processors delivered excellent generational performance gains over the EPYC 9004 series, leading performance over the new Xeon 6900P Granite Rapids series, and completing the trifecta is leading performance-per-dollar as well. The EPYC 9755 has a list price of $12,984 and the EPYC 9965 192-core processor has a list price of $14,813 while the Xeon 6980P has a list price of $17,800. There is significant savings in going for EPYC 9005 series.
Following reports of AMD’s plans for Ryzen Threadripper X3D CPUs, another source has confirmed the existence of this V-Cache-enhanced monster CPU range. AMD’s 3D V-Cache technology is coming to other next-generation AMD products. Regarding Threadripper, CCDs on AMD’s X3D CPUs will be “all stacked”. This means that all CCDs on AMD’s Ryzen Threadripper X3D CPUs will feature 3D V-Cache. This makes sense now that AMD has been able to achieve higher clocks speeds with their latest X3D CPUs. With AMD’s next-generation “Halo-level” APUs, AMD will reportedly add its 3D V-Cache to boost the performance of its CPU and GPU components. This makes sense, given these products’ often bandwidth-starved nature.
Adding 3D V-Cache to AMD’s next-generation version of “Strix Halo” would be a great move for AMD to make. After all, this chip would aim to deliver discrete-level GPU performance and high-end CPU performance within a single mobile-friendly package. AMD’s Strix Halo APU will reportedly launch in 2025 with 16 Zen 5 CPU cores and an RDNA 3.5 GPU with 40 compute units. The GPU is said to deliver performance levels similar to those of an RTX 4070 (mobile), and its next-generation counterpart should be even stronger. As mentioned before, AMD’s APUs are often bandwidth-starved. While AMD’s X3D V-Cache technology is often used to deliver performance gains through decreased data access latencies (accessing data on cache is orders of magnitude faster than accessing data on DRAM), it also frees up bandwidth on higher-level memory pools.
Adding 3D V-Cache to an APU will free up system memory bandwidth, which could be used elsewhere. This makes AMD’s X3D technology doubly beneficial. It will give their next-gen “Halo” APUs the same X3D benefits as existing CPUs. Furthermore, it will free up bandwidth that can speed up other areas of the SOC. With this X3D APU, AMD could use V-Cache on just the CPU (or GPU), on both the CPU and GPU (separately), or on both using a shared X3D cache. Regardless of what way AMD uses it, it will boost overall SOC performance. That’s good news for AMD, and their future laptop customers.
The custom AMD CPU used for HBv5 VMs leverages HBM3, usually the memory of choice for the latest data center-class GPUs, such as AMD’s MI300X. With a bandwidth of 6.9TB/s from four of the chips in a single VM, the VMs are almost nine times faster than the Genoa-X CPUs that Microsoft offers in HBv4 VMs, and nearly 20 times faster than Milan-X chips in HBv3 VMs. When paired with a CPU, the HBM3 fulfills a similar role as 3D V-Cache. Still, instead of expanding the pool of L3 cache, it effectively adds a massive L4 cache with even greater bandwidth and presumably much worse latency. However, the latter isn't as important in certain types of workloads.
Unlike Intel with the Xeon Max CPUs, AMD has not yet had an EPYC processor with HBM. The Azure HBv5 VM should be able to offer 6.9 TB/s of storage bandwidth. However, this does not consist of just one processor; Microsoft specifies 352 Zen 4 cores with a clock speed of up to 4 GHz. Each core should have up to 9 GB available and the mentioned 6.9 TB/s will be achieved in the STREAM Triad on 400 to 450 GB of HBM3. SMT is disabled and there is only one VM per server, so multiple VMs do not have to share the hardware. Apparently the EPYC processors with HBM were in development at AMD as Instinct MI300C. The model name is EPYC 9v64H.
AMD's Threadripper lineup continues to deliver high-performance processors for enthusiasts and demanding workstation users. The company is sticking with the same successful formula for the upcoming Threadripper 9000 series, codenamed "Shimada Peak." These new chips have been spotted in shipping manifests, providing an early look at core configurations and more. The shipping manifest, reveals that AMD is preparing 96-core, 64-core, 32-core, and 16-core variants for the Threadripper 9000 series. Notably, all the listed SKUs share a 350W TDP, which is identical to the "Storm Peak" CPUs they are likely set to replace.
At the top of the lineup is the 96-core, 192-thread powerhouse, featuring a massive 12 CCDs, each with eight cores and 32MB of L3 cache. This adds up to a total of 384MB of L3 cache. The design closely mirrors that of the existing Threadripper Pro 7995WX processor. However, the efficiency and performance gains from the Zen 5 architecture, coupled with a newer TSMC process node, offer significant improvements. Expect better performance-per-watt compared to the Zen 4 chips. At the other end of the spectrum is the 16-core variant, which features dual 8-core CCDs, delivering substantial power for tasks that require high single-thread and moderate multi-thread performance.
Overall, the Shimada Peak series' core configurations appear to be tailored to meet the needs of a broad range of users, from professionals seeking maximum parallel processing power to enthusiasts looking for more mainstream options. AMD's commitment to supporting the sTR5 socket for at least two generations is a welcome move, as previous socket transitions haven't always been this user-friendly. This compatibility offers a degree of future-proofing for those investing in such a high-end platform. That said, AMD has not yet officially confirmed the Threadripper 9000 series, but these leaks align with rumors pointing to a launch later this year.
AMD's Threadripper Pro 9000 series, the next generation of its high-performance workstation CPUs, has made an appearance on shipping manifests, hinting at an imminent launch. These logs have revealed key details about two of the upcoming models: the Threadripper Pro 9975WX and 9965WX. The processors are based on AMD's new Zen 5 architecture and expected to introduce significant upgrades while maintaining compatibility with existing platforms. The leaks confirm the existence of the 32-core Threadripper Pro 9975WX and the 24-core Threadripper Pro 9965WX. Both CPUs will feature hyperthreading, with 64 and 48 threads, respectively. This aligns with their predecessors in the Threadripper Pro 7000 series, which also offered the same core and thread configurations. However, the new models will benefit from the Zen 5 architecture, promising improved performance and efficiency.
One notable constant is the thermal design power (TDP), which remains at 350W for both models. This matches the wattage of the current-gen Threadripper Pro 7000 series, ensuring drop-in compatibility for existing systems. Beyond these two models, the Threadripper Pro 9000 series is expected to feature five models in all, ranging from 16 to 96 cores. Chips including a flagship 96-core/192-thread Threadripper Pro 9995WX, a 64-core/128-thread 9985WX, and a 16-core/32-thread 9955WX have previously been spotted. Interestingly, AMD may skip the 12-core variant this time.
Under the hood, the Zen 5 architecture brings a smaller 4nm process node, offering better power efficiency compared to the 5nm node used in the Threadripper 7000 series. Each Zen 5 core complex die (CCD) packs eight cores and 32MB of L3 cache, meaning the 32-core 9975WX will utilize four CCDs, while the 96-core 9995WX will house a whopping 12 CCDs and 384MB of L3 cache. This cache structure mirrors the current generation, suggesting no major changes in this area. That said, while the leaks provide a glimpse into AMD's plans, it's important to note that shipping manifests are not official sources. AMD has yet to confirm the lineup or announce a release date. But the mere appearance of these logs hints that an official launch could be just around the corner.
The Threadripper 9000 series, codenamed Shimada Peak, support was recently introduced for the Gigabyte TRX50 motherboard series. It seems ASUS is following suit by confirming the name of the series directly. As expected, the new Zen 5 series will be a drop-in replacement for the Zen 4 generation, retaining the same package and socket support. The latest SKU lists confirm five variants featuring 12 to 64 cores. It is almost certain that AMD will also launch a 96-core version, matching the core count of the previous series (Storm Peak). These CPUs will be a drop-in replacement for the sTR5 socket and will maintain the same 350W TDP. The word is that Threadripper will be part of the Computex 2025 showcase. AMD has a press event planned where they promised product announcements for gaming and professional markets.
The EPYC Venice series is said to come in two variants, specifically for the SP7 and SP8 sockets. The latter is said to be limited to 128 Zen6c or 96 Zen6 cores with a 350-400W TDP, while SP7 would feature up to 256 cores (so only Zen6c implementations) and an even higher TDP of 600W. Each CCD packs 12 Zen 6 cores, and there are multiple IODs in the middle, which would lead to further expansion of I/O capabilities on these server platforms. It is not reported if the 128 MB L3 cache is for the Zen 6 or Zen 6C variants, but for a Zen 6C EPYC chip, which gives us 2 MB of L3 per core. As for the EPYC 9006 "Zen 6" SKUs, they will have up to 96 cores and 192 threads with up to 8 CCDs as reported above, while Zen 6C variants will scale up to 256 cores and 512 threads.
AMD announced its new Zen 5-powered Ryzen Threadripper Pro 9000 WX-series and non-Pro processors here at Computex 2025 in Taipei, Taiwan, touting up to 96 cores and 192 threads in the flagship 9995WX. AMD's newest 'Shamida Peak' Threadrippers bring the benefits of the Zen 5 architecture to AMD's premier WX-Series workstation and non-Pro processors, saying they deliver up to 2.2X the performance in rendering than Intel's fastest competing Xeon-W chips. AMD also revamped its non-Pro Ryzen Threadripper 9000-series chips, with the flagship 9980X HEDT chip wielding 64 cores and 128 threads. AMD's full Threadripper 9000 series will be available in July.
The Threadripper 9000 chips have much in common with their predecessors, the Threadripper 7000 series, with AMD continuing to split the chips into the Pro and HEDT swimlanes. The chips also have the same core counts, base clocks, and cache capacities (up to 384MB) as the prior-gen models across the range of the product stack, but the peak boost clocks have been bumped up to 5.4 GHz for all models, an increase ranging from 100 to 300 MHz. The TDP ratings also remain the same 350W for all models. The processors provide up to 22% more performance than the prior-gen in threaded workloads, and the lion's share of their increased performance from the jump from the Zen 4 architecture to Zen 5, which imparts a 16% IPC gain, and the move from 5nm to 4nm for the compute dies.
Both families of Threadripper 9000 chips will drop into the same sTR5 socket as the prior-gen chips. The WR90 platform with support for eight channels of memory will house the Pro chips, while value-optmized TRX50 boards with support for four channels of memory house the HEDT processors. After a BIOS update, the new chips are compatible with existing motherboards. AMD expects a few new refreshed motherboard models from vendors, but it says the chips will largely leverage the existing ecosystem of sTR5 motherboards. As such, all of the existing sTR5 coolers on the market are fully compatible with the new processors.
